Sunday, September 27
EOS/ESD Association, Inc. Annual Meeting & Reception - Open to All Attendees
Monday, September 28
Continental Breakfast
Registration Open
Opening Welcome
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Keynote: Deep Neural Networks and Transfer Learning: Unlocking the Potential for ESD Data Analysis and Simulations
Mehrdad Nourani
Mehrdad Nourani received a Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by the National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.
2027 ESDA Roadmap Update
Networking Coffee Break
1A.1 Impact of Process and Fab-to-Fab Variations to ESD Robustness of Snapback-Based ESD Protection Devices
Gianluca Boselli
Gianluca Boselli earned his MS in EE from the University of Parma (1996) and PhD from the University of Twente (2001). He joined Texas Instruments in 2001, focusing on ESD and latch-up for CMOS technologies. He currently manages TI's corporate ESD Team and directs the Advanced Technology Development University Research Program. A prolific author and speaker, he has received multiple best paper awards and the prestigious ESD Association Outstanding Contribution Award (2019). He holds 20+ patents, serves on the EOS/ESD Association Board of Directors as Chief Strategist, and is an IEEE Senior Member.
1B.1 An Empirical Approach to Predict FICDM ESD Current Waveform and Product Robustness
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.
1A.2 Mechanism of Premature ESD Failure Adjacent HV PNP ESD Device under IO-to-IO Stress
Jehoon Lee
Jehoon Lee received his B.S., M.S., and Ph.D. degrees in Electronic and Electrical Engineering from Dankook University (DKU), Korea, in 2016, 2018, and 2023, respectively. He is currently with the ESD/TCAD Team at DBHiTek. His research focuses on ESD protection design in BCD, CIS, LDI, and other processes, as well as TCAD-based device analysis.
1B.2 Modeling of ESD Diodes in the CDM Time Domain
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Symposium Paper Awards Presentation Lunch
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Alain Louiseau
Alain Loiseau received a maîtrise in Electrical Engineering from the Université des Sciences et Techniques du Languedoc, France, in 1993 and a master's in electrical engineering from the University of Virginia in 1995. He has worked for IBM, STMicro, and GLOBALFOUNDRIES on CMOS technology development and characterization, CPU power reduction, flash array functional testing, high-voltage FET reliability, and ESD. He holds over 100 US patents and has (co)-authored 13 papers.
Interactive Seminar: Applying Air-discharge ESD to conductors: Is it time to stop the madness?
Hans Kunz
Hans Kunz joined Texas Instruments in 2003, after nine years at Dallas Semiconductor/Maxim, and was elected Distinguished Member of Technical Staff in 2017. His past responsibilities include designing, developing, and implementing ESD protection circuits for analog CMOS and high-voltage BiCMOS technologies, as well as developing ESD verification tools and methodologies. Hans is currently focused on developing test, measurement, and design methodologies for system-level ESD protection at the IC level. Hans is a co-author of multiple publications on ESD and received the Best Presentation Award at the 2006 EOS/ESD Symposium. He holds 13 patents.
Interactive Seminar: Process Assessment - ESD Event Detection
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
Friedrich zur Nieden
Friedrich zur Nieden received the Ph.D. degree in electrical engineering from TU Dortmund University, Germany, in 2014. From 2007 to 2012, he was a research and teaching assistant at the On-Board Systems Laboratory at TU Dortmund University. In 2010, he received a scholarship from the German Academic Exchange Service, which allowed him to stay at the University of Missouri Science and Technology in Rolla, Missouri, USA, where he continued his work in system-level ESD simulation. In 2012, he joined the central ESD department at Infineon Technologies AG in Munich, Germany. At Infineon, he works on ESD topics, focusing on characterization, device testing, ESD at the system level, and production support.
Afternoon Networking Break with Refreshments
2A.1 Characterization and Benchmarking of ESD Diodes in CFET Technology
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.
M1.1 Antenna-Oscilloscope-Combinations for ESD Detection
Mohamed Chefai
Mohamed Chefai received his Master's degree in Electrical Engineering from the Technical University of Munich (TUM) in 2022. After his studies, he joined the central ESD department of Infineon Technologies AG based in Munich, Germany. In his current position at Infineon, Mohamed works on ESD engineering with a strong focus on device testing.
2A.2 Nanosheet Sub-ns ESD Endurance and I/O Circuit Co-Optimization for ESD Risk Mitigation
Tzu-Hao Chiang
Tzu-Hao Chiang received the B.S. degree in electrical engineering and the M.S. degree in electronic engineering from National Taiwan University, Taipei, Taiwan, in 2020. He joined Taiwan Semiconductor Manufacturing Company (TSMC) in 2020, where he is currently a senior engineer in the ESD/EOS Technology Department. His work focuses on single-event latch-up (SEL) and ESD victim design solution development.
M1.2 The Hazards of Plastic Bottles for Containment of Flammable Materials
David E. Swenson
David E. Swenson retired in 2003 after 35 years of service at 3M. While at 3M, he was responsible for new static control packaging material development and application, training 3M personnel worldwide, and providing application assistance to users of static control products globally, with particular emphasis on Asia Pacific and Japan. Dave and his wife, Geri, established a new company, Affinity Static Control Consulting, L.L.C., in 2003, and support clients around the world. Dave has been a member of the ESD Association since 1984 and has served in many capacities, including as the 1997 Symposium General Chair and as president of the Association in 1998 and 1999, and again in 2008 and 2009. He is currently appointed to the Board of Directors to assist with technical inquiries. Dave was presented with the ESD Association's highest award, the “Outstanding Contributions Award,” in 2002. He is an original member of the ESDA Standards Committee, serving on many Working Groups and the ANSI/ESD S20.20 Task Team. He is a member of the Electrostatic Society of America and IMAPS, and is a retired US Expert on IEC TC101, Electrostatics, after serving for more than 20 years.
2A.3 Impact of Buried Power Rails on Thin-Substrate ESD Diode Performance
Emanuele Groppo
Emanuele Groppo received his B.Sc. (2020) and M.Sc. (2022) in Electronic Engineering from Politecnico di Torino, Italy. He is currently pursuing a Ph.D. at the Technical University of Munich (TUM), Chair of Circuit Design. In 2023, he joined the ESD team at Intel in Munich, Germany. The focus of his research is on novel ESD devices and solutions for advanced semiconductor technologies.
M1.3 Risk Assessment of Processes with Printed Circuit Boards
Kai Esmark
Kai has experience in the field of ESD and EOS for more than 25 years. He is Senior Principal for "Overvoltage robust design" in the Power and Sensor Solution business group of Infineon in Munich (Germany). In his role, he oversees the development of robustness concepts against electrically related threat scenarios at the IC and system levels. He also acts as a consultant at Infineon regarding EOS (better: EIPD)- related field returns, supporting root cause analysis. Kai contributes to the development of standard practice documents in the Automotive Industry, addressing semiconductor devices exhibiting signs of electrical overstress. These activities are in close cooperation with USCAR (United States Council for Automotive Research) and VDA (German Association of the Automotive Industry).
Year in Review: ESD Protection Challenges and Strategies in Advanced CMOS Technologies
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.
Author's Corner for 1A.1, 1A.2, 1B.1, 1B.2, 2A.1, 2A.2, 2A.3, M1.1, M1.2, M1.3
Gianluca Boselli
Gianluca Boselli earned his MS in EE from the University of Parma (1996) and PhD from the University of Twente (2001). He joined Texas Instruments in 2001, focusing on ESD and latch-up for CMOS technologies. He currently manages TI's corporate ESD Team and directs the Advanced Technology Development University Research Program. A prolific author and speaker, he has received multiple best paper awards and the prestigious ESD Association Outstanding Contribution Award (2019). He holds 20+ patents, serves on the EOS/ESD Association Board of Directors as Chief Strategist, and is an IEEE Senior Member.
Mohamed Chefai
Mohamed Chefai received his Master's degree in Electrical Engineering from the Technical University of Munich (TUM) in 2022. After his studies, he joined the central ESD department of Infineon Technologies AG based in Munich, Germany. In his current position at Infineon, Mohamed works on ESD engineering with a strong focus on device testing.
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.
Tzu-Hao Chiang
Tzu-Hao Chiang received the B.S. degree in electrical engineering and the M.S. degree in electronic engineering from National Taiwan University, Taipei, Taiwan, in 2020. He joined Taiwan Semiconductor Manufacturing Company (TSMC) in 2020, where he is currently a senior engineer in the ESD/EOS Technology Department. His work focuses on single-event latch-up (SEL) and ESD victim design solution development.
Kai Esmark
Kai has experience in the field of ESD and EOS for more than 25 years. He is Senior Principal for "Overvoltage robust design" in the Power and Sensor Solution business group of Infineon in Munich (Germany). In his role, he oversees the development of robustness concepts against electrically related threat scenarios at the IC and system levels. He also acts as a consultant at Infineon regarding EOS (better: EIPD)- related field returns, supporting root cause analysis. Kai contributes to the development of standard practice documents in the Automotive Industry, addressing semiconductor devices exhibiting signs of electrical overstress. These activities are in close cooperation with USCAR (United States Council for Automotive Research) and VDA (German Association of the Automotive Industry).
Emanuele Groppo
Emanuele Groppo received his B.Sc. (2020) and M.Sc. (2022) in Electronic Engineering from Politecnico di Torino, Italy. He is currently pursuing a Ph.D. at the Technical University of Munich (TUM), Chair of Circuit Design. In 2023, he joined the ESD team at Intel in Munich, Germany. The focus of his research is on novel ESD devices and solutions for advanced semiconductor technologies.
Jehoon Lee
Jehoon Lee received his B.S., M.S., and Ph.D. degrees in Electronic and Electrical Engineering from Dankook University (DKU), Korea, in 2016, 2018, and 2023, respectively. He is currently with the ESD/TCAD Team at DBHiTek. His research focuses on ESD protection design in BCD, CIS, LDI, and other processes, as well as TCAD-based device analysis.
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.
David E. Swenson
David E. Swenson retired in 2003 after 35 years of service at 3M. While at 3M, he was responsible for new static control packaging material development and application, training 3M personnel worldwide, and providing application assistance to users of static control products globally, with particular emphasis on Asia Pacific and Japan. Dave and his wife, Geri, established a new company, Affinity Static Control Consulting, L.L.C., in 2003, and support clients around the world. Dave has been a member of the ESD Association since 1984 and has served in many capacities, including as the 1997 Symposium General Chair and as president of the Association in 1998 and 1999, and again in 2008 and 2009. He is currently appointed to the Board of Directors to assist with technical inquiries. Dave was presented with the ESD Association's highest award, the “Outstanding Contributions Award,” in 2002. He is an original member of the ESDA Standards Committee, serving on many Working Groups and the ANSI/ESD S20.20 Task Team. He is a member of the Electrostatic Society of America and IMAPS, and is a retired US Expert on IEC TC101, Electrostatics, after serving for more than 20 years.
Welcome Reception - Exhibits Open
Tuesday, September 29
Continental Breakfast
Professional and Technical Women's Breakfast Reception
Morning Welcome
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Registration is Open
Keynote: Reliability Risk in Harsh Radiation Environments: Why Good Electrical Latch-up Performance is NOT Sufficient to Guarantee Radiation Hardness
Richard C. Baumann
With a Ph.D. from Rice University and nearly 30 years of technical leadership at Texas Instruments, Robert C. Baumann is a pioneer in the field of radiation effects. Most notably, his research into low-energy cosmic-ray neutrons resulted in a 10x reduction in integrated circuit reliability failure rates across the industry. His career is defined by transformative contributions, from inventing the industry’s first web-based soft-error calculator to developing ultra-low alpha packaging flows. Robert drove several external radiation-effects standards and was directly responsible for drafting the JEDEC 89/89A radiation test standard. He also led a panel of experts that successfully negotiated with Congress and the Department of Commerce to change ITAR regulations, eliminating inadvertent and arbitrary export control restrictions on U.S. semiconductor companies. In his last 6 years at TI, he was the chief technologist for the Aerospace and Defense Product group, where he expanded TI’s radiation-effects characterization capabilities and defined and enabled the development of new radiation-hardened products. Robert retired in 2018 and started a consultancy (Radiosity Solutions) providing leading-edge solutions to the aerospace and semiconductor industries. He was also a part-time faculty member/research scientist developing radiation-effects programs at SMU (’18-22) and then at UT Dallas (’22-26), where he helped build the Center for Harsh Environment Semiconductors and Systems (CHESS). Robert is a TI Fellow (emeritus) and IEEE Fellow, has coauthored > 100 papers/presentations, coauthored TI’s popular “Radiation Handbook for Electronics”, two book chapters, and holds 17 patents.
Exhibit Hall is Open - Come visit our Exhibitors!
Guided Tours in the Exhibit Hall
3A.1 Detection-Based System-Level ESD Management Using Inactive CMOS Pins in High-Speed DDR Interfaces
Jun-Bae Kim
Jun‑Bae Kim holds a Ph.D. in electrical engineering and is a Principal Engineer at Samsung Electronics with over 20 years of experience in DRAM circuit design and reliability. He spent more than a decade on DRAM I/O, high‑speed interface, and signal‑integrity design, then transitioned to system‑level ESD engineering, investigating ESD‑induced failures in high‑speed memory and EMI mitigation for mobile DRAM. Since 2024, he has tackled ESD challenges in stacked‑DRAM packaging and manufacturing. His current research focuses on system‑level ESD, the charged‑device model (CDM), and ESD‑aware design methodologies.
M2.1 Evaluating Ionizer Efficiency Using a Discharge Current Sensor
Heinrich Wolf
Heinrich Wolf received his PhD from the Technical University of Berlin, Germany. In 1999, he joined the Munich branch of the Fraunhofer Institute for Reliability and Microintegration (IZM), which became the Fraunhofer Institute for Electronic Microsystems and Solid State Technologies EMFT. In his role as an expert in test and measurement, he became chief scientist at the EMFT and co-leads the Test of Electronic and Quantum Systems (TEQ) group. He also co-chairs the CDM Joint Working Group in the standardization body of the ESD Association, and represents the German ESD-Forum in the standards working groups.
3A.2 A Physics-Informed Deep Learning Model for Standardized Air Discharge ESD Waveform Monitoring
Ruoyu Hu
Ruoyu Hu is currently working as a reliability engineer at Amazon. Ruoyu received his PhD from the University of Southampton, with a major in Bioelectronic Sensors. Before that, he earned his Master of Engineering degree in electronics from the University of Edinburgh. He was awarded a Bachelor's degree in Electronic Engineering and Automation from Beijing Institute of Technology. Ruoyu worked at Neuron Network on CV-related research and on their automation application at Amazon. He also dives deep into ESD-related research and protection methodology related to tests.
M2.2 Humidity Dependence of Material Characteristics and Effects on ESD Control
Toni Viheriäkoski
Toni Viheriäkoski established electrostatics laboratory services for Nokia in 2001. He specializes in electrostatics and ESD risk analysis across healthcare, medical, electronics, automotive, and process industries through his company, Cascade Metrology. He has authored over 30 publications on electrostatics and ESD. Toni serves as Chair of the Finnish STAHA Association and the Standardization Committee SK101, and contributes to IEC TC101 and the EOS/ESD Association workgroups. He received the IEC 1906 Award in 2019, the EOS/ESD Association Outstanding Paper Award in 2022, the Best Paper Award as co-author in 2023, and an international fellow award in Electrostatics in 2025.
3A.3 Pre-Spark Charge Loss During Air-Discharge ESD Testing
Hans Kunz
Hans Kunz joined Texas Instruments in 2003, after nine years at Dallas Semiconductor/Maxim, and was elected Distinguished Member of Technical Staff in 2017. His past responsibilities include designing, developing, and implementing ESD protection circuits for analog CMOS and high-voltage BiCMOS technologies, as well as developing ESD verification tools and methodologies. Hans is currently focused on developing test, measurement, and design methodologies for system-level ESD protection at the IC level. Hans is a co-author of multiple publications on ESD and received the Best Presentation Award at the 2006 EOS/ESD Symposium. He holds 13 patents.
M2.3 A Distributed Active ESD Event Detector for In Line Low-Level ESD Monitoring
Chang-Jiun Lai
Chang-Jiun Lai received the B.S. degree from the Department of Electronics and Electrical Engineering, National Yang-Ming Chiao Tung University (NYCU), Hsinchu, Taiwan, in 2024, and the M.S. degree from the Institute of Electronics, National Yang Ming Chiao Tung University (NYCU), Hsinchu, Taiwan, in 2025. He is currently an engineer of mixed-signal analog circuit design with NVIDIA Corporation.
Activities and Coffee in the Exhibit Hall
4A.1 Overview of Standalone MOS Based Protections and Network Integrations
Johan Bourgeat
Johan received his PhD in 2011, specializing in innovative ESD (Electrostatic Discharge) devices in the C28SOI node. He joined STMicroelectronics, where he has dedicated his expertise to developing new SCR-based ESD solutions. Over the years, Johan has been responsible for advancing ESD protections for analog, RF, and high-voltage applications, as well as addressing latch-up issues in CMOS, Bi-CMOS, and PIC technologies.
He is currently an active member of the technical staff community and serves on the ESD/EOS/EMC/Latch-Up Steering Committee. Recently, he has taken on the leadership role of the TDP/IPLD ESD Team based in Crolles. Johan is also an innovative contributor to the field, regularly filing patents and publishing at various scientific conferences.
Keynote: Ionic Thrust
Jay Bowles
Highly motivated filmmaker, scientific presenter, and researcher. Star of the YouTube Plasma Channel - https://www.youtube.com/PlasmaChannel.
4A.2 HV Power Stage Protection with NLDMOS-SCR
Vladislav Vashchenko
Dr. Vladislav Vashchenko has been the Sr. Director, Power ESD Group at Analog Devices Corp since 2011. He is responsible for aspects of power analog ESD/Latch-up IC co-design business process and technology development. Previously, he managed ESD technology development at National Semiconductor (2000-2011). He received an MS Engineer-Physicist (1987), a Ph.D. in Physics of Semiconductors from MIPT (1990), and a "Doctor of Science in Microelectronics" habilitation degree (1997). He is the author of 150 U.S. patents, over 120 papers, and co-author of three books in the ESD field.
Light Networking Lunch in the Exhibit Hall
Workshop: To be announced
Workshop: Ask the General ESD Control Experts
Wolfgang Stadler
Wolfgang Stadler is a consultant specializing in electrostatic discharge (ESD) and electrical overstress (EOS), with 30 years of experience in both areas. He is the co-founder and co-owner of Gärtner & Stadler ESD Consulting GmbH & Co. KG. He actively participates in the EOS/ESD Association and IEC working groups focused on ESD control and process assessment. Wolfgang is co-chair of the ESDA business unit "Standardization". Wolfgang is appointed to the Board of Directors of the EOS/ESD Association. In 2019, he received the Outstanding Contribution Award from the EOS/ESD Association, and in 2021, the Joel P. Weidendorf Award for his significant contributions to the development of EOS/ESD standards. He is a member of the German National Committee DKE/K 185 and has served as Secretary of IEC TC101 since January 2026. Since 2015, he has been serving as president of the German ESD FORUM e.V.
Afternoon Networking Break with Refreshments in the Exhibit Hall
5A.1 Evaluation of a Short Event between the Supply Voltage and a SuperSpeed Line in a USB-C Connector for the Standard and Extended Power Range
Steffen Holland
Steffen Holland received his PhD in Physics from the University of Hamburg. He joined Nexperia's bipolar process development group in Hamburg, Germany, in 2005. The focus of his work quickly became TCAD process and device simulations for discrete ESD protection devices. He now works on TVS protection devices. His interests are system-level ESD simulations, and he is chair of the ESDA working group 26. He serves on the Board of Directors at the ESDA.
Manufacturing Hands-on: ESD Control Basics
Devin Hart
Devin serves as the ESD Technical Lead and ESD SME at Honeywell FM&T. He is passionate about ensuring the workforce is properly trained to handle ESDS product. He created multiple e-learning and hands-on training courses focused on ESD, soldering processes, and electrical/mechanical assembly. Focusing on improving efficiency, he has built several software tools to help mistake-proof and automate tasks, such as the ESD preventative maintenance check process and database. Supporting high reliability product, Devin is developing several innovative solutions to mitigate ESD risk and mistake-proof ESD processes. He created a structured process and trained up a team to evaluate ESD non-conformances in the production environment. Devin enjoys being a member of several ESD Association working groups and task teams. He graduated from Missouri Western State University with a BS in Manufacturing Engineering Technology and an MAS in Engineering Technology Management. Outside of work, Devin enjoys wood working, traveling, being active in his church, and being a husband and a father.
Dale Parkin
Dale Parkin was the ESD Coordinator for Seagate Technology Twin Cities Operations located in Shakopee, MN; where has been employed since 2007. In addition to Dale’s Site Responsibilities, he led the Seagate Corporate ESD Material Test Laboratory. Dale led ESD audits at suppliers, sub-contractors, OEM, and business partners. Dale co-author on a Patent while at Seagate on Dynamic Body Voltage Testing. Previously Dale was employed at IBM, Rochester, MN. for 33 years, where he worked as Corporate Standards Project Authority for Electrostatic Discharge Protection. Dale has authored and co-numerous technical disclosures and papers while at IBM related to ESD Control. He has also co-authored several papers that have been presented at previous EOS/ESD Symposiums. Dale has been a member of the ESDA since 1984 and is an iNARTE Certified ESD Engineer. As a member of the ESDA, he has served as in many different positions, including Vice President and on the Board of Directors. Currently participates in several Committees; Standards, Human Resources, Nominations and Manufacturing Symposium Steering. Dale has volunteered many times over in several other ESDA facets; Workshop Chairman and Panel Lead, Volunteer Recognition Chairman, AV Chairman, Symposium Advisor and monitored many tutorials. Dale is currently the Standards Working Group Chairman for WG4 - Worksurfaces, WG9 – Footwear and WG97 – Footwear/Flooring Systems. He participates as a member of WG1 – Wrist Straps, WG2 - Garments, WG3 - Ionization, WG7 – Flooring, WG11 - Packaging, WG15 – Gloves, WG17 – Process Assessment, WG19 – High Reliability ESD Control Processes, WG20.20 – ESD Control Program , Standards Committee, Working Group Chairs, Nominations, Awards. In 2007, Dale was awarded the David Barber Sr. Memorial Award for his contribution to the development, organization, management, and growth of the EOS/ESD Symposium. In 2012, Dale was awarded the ESDA President Award in recognition of significant contributions, leadership and management that has enhanced EOS/ESD Association, Inc. operations and effectiveness in serving industry and the organization. In 2015, Dale was received the Volunteer Merit Award. The Volunteer Merit Award is to recognize the dedication, exemplary effort, and/or outstanding participation of an EOS/ESD Association, Inc. volunteer in regard to the development and promulgation of our organization’s activities and committee work with the nominations coming from volunteer peers. In 2017, Dale was awarded the Outstanding Contribution Award. The Outstanding Contributions Award is EOS/ESD Association, Inc.’s most prestigious award. It is awarded to an individual who has made a significant impact in the field of EOS/ESD through technical achievement or has made major contributions to either the development or the operation of EOS/ESD Association, Inc. In 2018, Dale was awarded the Joel Weidendorf Memorial Standards Award. The Joel Weidendorf Memorial Standards Award is presented to an individual who has made a significant contribution to the development of EOS/ESD Association, Inc. standards. He is a member of the North Central ESD Chapter. He has served as Past President, Vice President and Program Chairman. He is currently a member of the Chapter’s Board of Directors and is presently the Chapter’s National ESDA Delegate.
Victor Skulavik II
Wolfgang Stadler
Wolfgang Stadler is a consultant specializing in electrostatic discharge (ESD) and electrical overstress (EOS), with 30 years of experience in both areas. He is the co-founder and co-owner of Gärtner & Stadler ESD Consulting GmbH & Co. KG. He actively participates in the EOS/ESD Association and IEC working groups focused on ESD control and process assessment. Wolfgang is co-chair of the ESDA business unit "Standardization". Wolfgang is appointed to the Board of Directors of the EOS/ESD Association. In 2019, he received the Outstanding Contribution Award from the EOS/ESD Association, and in 2021, the Joel P. Weidendorf Award for his significant contributions to the development of EOS/ESD standards. He is a member of the German National Committee DKE/K 185 and has served as Secretary of IEC TC101 since January 2026. Since 2015, he has been serving as president of the German ESD FORUM e.V.
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
5A.2 ESD Robustness of AC-Coupling Capacitors in Differential High-Speed Interfaces
Martin Pilaski
Martin holds a diploma* in Computer Engineering from Mannheim University. He joined Philips Semiconductors in 2005 and has since then worked in several product design and application marketing roles for NXP and Nexperia. Martin is currently responsible for worldwide product application support of Nexperia's ESD Protection and Filtering portfolio with a focus on mobile, portable, consumer, and computing applications.
5A.3 Scalable ESD Modeling of Non-Linear Multilayer Ceramic Capacitor Under System-Level ESD
Kendrik Emkel Ginting
Kendrik Emkel Ginting received the B.Sc. degree in Electrical Engineering from Bandung Institute of Technology (ITB), Indonesia, in 2023, and the M.Sc. degree in Communications and Electronics Engineering from the Technical University of Munich (TUM), Germany, in 2025.
From 2024 to 2026, he was with the ESD Department of Infineon Technologies AG, Neubiberg, Germany, where he worked on system-level electrostatic discharge (ESD). Since February 2026, he has been a University Project Assistant at Graz University of Technology, Austria, where he conducts research on ESD and electromagnetic compatibility (EMC). His research interests include system-level ESD, EMC, and reliability.
Networking break in the exhibit hall
Kendrik Emkel Ginting
Kendrik Emkel Ginting received the B.Sc. degree in Electrical Engineering from Bandung Institute of Technology (ITB), Indonesia, in 2023, and the M.Sc. degree in Communications and Electronics Engineering from the Technical University of Munich (TUM), Germany, in 2025.
From 2024 to 2026, he was with the ESD Department of Infineon Technologies AG, Neubiberg, Germany, where he worked on system-level electrostatic discharge (ESD). Since February 2026, he has been a University Project Assistant at Graz University of Technology, Austria, where he conducts research on ESD and electromagnetic compatibility (EMC). His research interests include system-level ESD, EMC, and reliability.
Steffen Holland
Steffen Holland received his PhD in Physics from the University of Hamburg. He joined Nexperia's bipolar process development group in Hamburg, Germany, in 2005. The focus of his work quickly became TCAD process and device simulations for discrete ESD protection devices. He now works on TVS protection devices. His interests are system-level ESD simulations, and he is chair of the ESDA working group 26. He serves on the Board of Directors at the ESDA.
Martin Pilaski
Martin holds a diploma* in Computer Engineering from Mannheim University. He joined Philips Semiconductors in 2005 and has since then worked in several product design and application marketing roles for NXP and Nexperia. Martin is currently responsible for worldwide product application support of Nexperia's ESD Protection and Filtering portfolio with a focus on mobile, portable, consumer, and computing applications.
Author's Corner for 3A.1, 3A.2, 3A.3, M2.1, M2.2, M2.3, 4A.1, 4A.2, 5A.1, 5A.2, 5A.3
Johan Bourgeat
Johan received his PhD in 2011, specializing in innovative ESD (Electrostatic Discharge) devices in the C28SOI node. He joined STMicroelectronics, where he has dedicated his expertise to developing new SCR-based ESD solutions. Over the years, Johan has been responsible for advancing ESD protections for analog, RF, and high-voltage applications, as well as addressing latch-up issues in CMOS, Bi-CMOS, and PIC technologies.
He is currently an active member of the technical staff community and serves on the ESD/EOS/EMC/Latch-Up Steering Committee. Recently, he has taken on the leadership role of the TDP/IPLD ESD Team based in Crolles. Johan is also an innovative contributor to the field, regularly filing patents and publishing at various scientific conferences.
Kendrik Emkel Ginting
Kendrik Emkel Ginting received the B.Sc. degree in Electrical Engineering from Bandung Institute of Technology (ITB), Indonesia, in 2023, and the M.Sc. degree in Communications and Electronics Engineering from the Technical University of Munich (TUM), Germany, in 2025.
From 2024 to 2026, he was with the ESD Department of Infineon Technologies AG, Neubiberg, Germany, where he worked on system-level electrostatic discharge (ESD). Since February 2026, he has been a University Project Assistant at Graz University of Technology, Austria, where he conducts research on ESD and electromagnetic compatibility (EMC). His research interests include system-level ESD, EMC, and reliability.
Steffen Holland
Steffen Holland received his PhD in Physics from the University of Hamburg. He joined Nexperia's bipolar process development group in Hamburg, Germany, in 2005. The focus of his work quickly became TCAD process and device simulations for discrete ESD protection devices. He now works on TVS protection devices. His interests are system-level ESD simulations, and he is chair of the ESDA working group 26. He serves on the Board of Directors at the ESDA.
Ruoyu Hu
Ruoyu Hu is currently working as a reliability engineer at Amazon. Ruoyu received his PhD from the University of Southampton, with a major in Bioelectronic Sensors. Before that, he earned his Master of Engineering degree in electronics from the University of Edinburgh. He was awarded a Bachelor's degree in Electronic Engineering and Automation from Beijing Institute of Technology. Ruoyu worked at Neuron Network on CV-related research and on their automation application at Amazon. He also dives deep into ESD-related research and protection methodology related to tests.
Jun-Bae Kim
Jun‑Bae Kim holds a Ph.D. in electrical engineering and is a Principal Engineer at Samsung Electronics with over 20 years of experience in DRAM circuit design and reliability. He spent more than a decade on DRAM I/O, high‑speed interface, and signal‑integrity design, then transitioned to system‑level ESD engineering, investigating ESD‑induced failures in high‑speed memory and EMI mitigation for mobile DRAM. Since 2024, he has tackled ESD challenges in stacked‑DRAM packaging and manufacturing. His current research focuses on system‑level ESD, the charged‑device model (CDM), and ESD‑aware design methodologies.
Hans Kunz
Hans Kunz joined Texas Instruments in 2003, after nine years at Dallas Semiconductor/Maxim, and was elected Distinguished Member of Technical Staff in 2017. His past responsibilities include designing, developing, and implementing ESD protection circuits for analog CMOS and high-voltage BiCMOS technologies, as well as developing ESD verification tools and methodologies. Hans is currently focused on developing test, measurement, and design methodologies for system-level ESD protection at the IC level. Hans is a co-author of multiple publications on ESD and received the Best Presentation Award at the 2006 EOS/ESD Symposium. He holds 13 patents.
Chang-Jiun Lai
Chang-Jiun Lai received the B.S. degree from the Department of Electronics and Electrical Engineering, National Yang-Ming Chiao Tung University (NYCU), Hsinchu, Taiwan, in 2024, and the M.S. degree from the Institute of Electronics, National Yang Ming Chiao Tung University (NYCU), Hsinchu, Taiwan, in 2025. He is currently an engineer of mixed-signal analog circuit design with NVIDIA Corporation.
Martin Pilaski
Martin holds a diploma* in Computer Engineering from Mannheim University. He joined Philips Semiconductors in 2005 and has since then worked in several product design and application marketing roles for NXP and Nexperia. Martin is currently responsible for worldwide product application support of Nexperia's ESD Protection and Filtering portfolio with a focus on mobile, portable, consumer, and computing applications.
Vladislav Vashchenko
Dr. Vladislav Vashchenko has been the Sr. Director, Power ESD Group at Analog Devices Corp since 2011. He is responsible for aspects of power analog ESD/Latch-up IC co-design business process and technology development. Previously, he managed ESD technology development at National Semiconductor (2000-2011). He received an MS Engineer-Physicist (1987), a Ph.D. in Physics of Semiconductors from MIPT (1990), and a "Doctor of Science in Microelectronics" habilitation degree (1997). He is the author of 150 U.S. patents, over 120 papers, and co-author of three books in the ESD field.
Toni Viheriäkoski
Toni Viheriäkoski established electrostatics laboratory services for Nokia in 2001. He specializes in electrostatics and ESD risk analysis across healthcare, medical, electronics, automotive, and process industries through his company, Cascade Metrology. He has authored over 30 publications on electrostatics and ESD. Toni serves as Chair of the Finnish STAHA Association and the Standardization Committee SK101, and contributes to IEC TC101 and the EOS/ESD Association workgroups. He received the IEC 1906 Award in 2019, the EOS/ESD Association Outstanding Paper Award in 2022, the Best Paper Award as co-author in 2023, and an international fellow award in Electrostatics in 2025.
Heinrich Wolf
Heinrich Wolf received his PhD from the Technical University of Berlin, Germany. In 1999, he joined the Munich branch of the Fraunhofer Institute for Reliability and Microintegration (IZM), which became the Fraunhofer Institute for Electronic Microsystems and Solid State Technologies EMFT. In his role as an expert in test and measurement, he became chief scientist at the EMFT and co-leads the Test of Electronic and Quantum Systems (TEQ) group. He also co-chairs the CDM Joint Working Group in the standardization body of the ESD Association, and represents the German ESD-Forum in the standards working groups.
Workshop: To be Announced
ESD Control Game
Victor Skulavik II
Wednesday, September 30
Continental Breakfast
Morning Welcome
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Registration Open
Keynote: Emerging Trends in High-Speed Applications, from Datacom to Base Stations
Brian Ginsburg
Brian Ginsburg received his B.S., M.Eng., and Ph.D. degrees from the Massachusetts Institute of Technology, graduating in 2007. He then joined Texas Instruments, Dallas, Texas, working in its wireless business. He was an analog design manager and systems manager of TI’s radar business. Now, he is a TI and IEEE Fellow who directs research in RF, Photonics, and Edge AI within TI’s Kilby Labs. He has previously served as the Program and General chairs of the Symposium on VLSI Technology and Circuits and is the RF subcommittee chair of the International Solid-State Circuits Conference.
Exhibit Hall Open - Coffee Available All Day
Activities and Coffee in the Exhibit Hall
6A.1 Low Leakage Protection for 1.2V Analog Circuit Blocks in Power Technologies
Vladislav Vashchenko
Dr. Vladislav Vashchenko has been the Sr. Director, Power ESD Group at Analog Devices Corp since 2011. He is responsible for aspects of power analog ESD/Latch-up IC co-design business process and technology development. Previously, he managed ESD technology development at National Semiconductor (2000-2011). He received an MS Engineer-Physicist (1987), a Ph.D. in Physics of Semiconductors from MIPT (1990), and a "Doctor of Science in Microelectronics" habilitation degree (1997). He is the author of 150 U.S. patents, over 120 papers, and co-author of three books in the ESD field.
6B.1 Statistical Process Characterization for ESD Design
Theo Smedes
After receiving his Ph.D. from the Eindhoven University of Technology with a thesis on compact device modeling, Theo Smedes worked at the Delft University of Technology on layout-to-circuit extraction. In 1995, he joined NXP Semiconductors (then Philips Semiconductors), working on tools for statistical design. Currently, he is an NXP Fellow for ESD and Latch-up. Theo is a member of all ESDA device testing working groups and chairs the TLP working group. He published several papers on ESD and received the 2007 Best Paper Award and the 2009, 2018, and 2022 Outstanding Paper Award of the EOS/ESD Symposium. Theo was the general chair of the EOS/ESD Symposium in 2013. He has been recognized with ESDA's David F. Barber Sr. Memorial Award (2017) and Outstanding Contribution Award (2022).
6A.2 On-Chip Gate ESD Protection for 650V E-Mode GaN HEMT Using 2DEG Resistor Between Trigger and Discharge Element
Nandha Kumar Subramani
Nandha Kumar Subramani received his PhD in Electronics Engineering from the Université de Limoges, France, in 2017, and his master's degree in Electrical and Electronics Engineering from the University of Sheffield in 2014. He has worked for GLOBALFOUNDRIES on ESD devices development and characterization, and TCAD device modeling. He has authored or co-authored several publications in the fields of GaN trap characterization, low-frequency noise measurements, TCAD-based physical simulations, and ESD device development.
6B.2 A Strategy for Alternative CDM Testing
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
6A.3 Investigation of High Voltage Grounded Ntype Well Latch-up Robustness in 55nm BCDLite Technology
Alwyn Rebello
Alwyn Rebello received an M.Sc. degree in Physics from Cochin University of Science and Technology, Kerala, India, in 2005, and a Ph.D. degree from the National University of Singapore (NUS), Singapore, in 2011. In 2017, he joined GLOBALFOUNDRIES in Singapore, where he is involved in the development of ESD and Latchup protection for technology nodes ranging from 0.18 μm to 28nm. His current research interests include ESD device development and latch-up prevention for various automotive and RF applications.
6B.3 CC-TLP Round Robin Testing: Analysis and Results
Friedrich zur Nieden
Friedrich zur Nieden received the Ph.D. degree in electrical engineering from TU Dortmund University, Germany, in 2014. From 2007 to 2012, he was a research and teaching assistant at the On-Board Systems Laboratory at TU Dortmund University. In 2010, he received a scholarship from the German Academic Exchange Service, which allowed him to stay at the University of Missouri Science and Technology in Rolla, Missouri, USA, where he continued his work in system-level ESD simulation. In 2012, he joined the central ESD department at Infineon Technologies AG in Munich, Germany. At Infineon, he works on ESD topics, focusing on characterization, device testing, ESD at the system level, and production support.
Transition Break
Year in Review: Contact Pulsed CDM Testing with CC-TLP
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
Friedrich zur Nieden
Friedrich zur Nieden received the Ph.D. degree in electrical engineering from TU Dortmund University, Germany, in 2014. From 2007 to 2012, he was a research and teaching assistant at the On-Board Systems Laboratory at TU Dortmund University. In 2010, he received a scholarship from the German Academic Exchange Service, which allowed him to stay at the University of Missouri Science and Technology in Rolla, Missouri, USA, where he continued his work in system-level ESD simulation. In 2012, he joined the central ESD department at Infineon Technologies AG in Munich, Germany. At Infineon, he works on ESD topics, focusing on characterization, device testing, ESD at the system level, and production support.
Light Networking Lunch in the Exhibit Hall
Workshop: To Be Announced
Networking Break with Light Refreshments
ESA Invited Presentation: Recent Advancement in Applications of Non-thermal Plasma for Medicine, Dentistry, Environment and Agriculture
Wamadeva Balachandran
Professor Balachandran is a globally recognized leader in Electronic Systems and Biomedical Engineering, currently serving as Research Professor in the Department of Electronic and Electrical Engineering and Director of the Electronic Systems Research Group. A Life Fellow of the IEEE and Fellow of multiple esteemed institutions—including the IET, Institute of Physics, InstMC, and the Royal Society of Arts—he exemplifies the highest standards of professional and academic excellence. He is also a Chartered Engineer and Chartered Physicist. With a distinguished career spanning decades, Professor Balachandran has made pioneering contributions at the intersection of electronics, bioengineering, and applied physics. His ground-breaking work on graphene-based biosensors for ECG and EEG monitoring is redefining the frontiers of non-invasive diagnostics. Professor Balachandran has authored over 400 scholarly papers and filed 15 patents, reflecting both the depth and breadth of his research. His visionary work has earned him the IEEE John Melcher Best Paper Award for Innovation and Creativity (2005) and the Lifetime Achievement Award from the Electrostatic Society of America (2017). He is a trusted advisor to industries worldwide, and his research has reached broad audiences through features on BBC World Service and international media outlets. Professor Balachandran’s career is a testament to the power of interdisciplinary innovation, global collaboration, and the pursuit of transformative technologies that address real-world challenges.
ESA Invited Presentation: Electrostatic Instruments and Measurements
Maciej A. Noras
Dr. Maciej A. Noras is an Associate Professor at the University of North Carolina at Charlotte. Before joining academia, he was an R&D engineer at Trek, Inc. for 7 years, designing high-voltage amplifiers and commercial electrostatic measurement equipment, including fieldmeters, electrostatic voltmeters, and resistivity meters. His academic research projects include the development of novel electric field sensors and signal processing, applications of high electric fields, and energy harvesting.
ESA Invited Presentation: Converting Industry Static Control - Practical Considerations Part 1
Mark Zaretsky
Mark Zaretsky was educated at MIT, earning a Ph.D. in Electrical Engineering, and went on to a 41-year career at Eastman Kodak, specializing in electrophotographic print technology and electrostatics in roll-to-roll manufacturing. Currently, he provides electrostatic consulting through ZStat, LLC, established in 2024. Dr. Zaretsky has 43 US patents and was honored as a Distinguished Inventor at Kodak. He also received the IS&T Charles Ives Award for co-authoring a paper on monitoring the electrophotographic development process. He serves on the editorial board of the Journal of Electrostatics and previously served as newsletter editor for the Electrostatic Society of America (ESA) for 17 years.
ESA Invited Presentation: Hazardous Area Static Control in Industrial Applications
Richard Puig
Richard Puig is a product manager for Newson Gale Inc. He has a degree in Marketing from Texas Tech University and an MBA from the University of Missouri. Member of NFPA 77 Technical Committee – Recommended Practice on Static Electricity. He is NICET Level III certified in Special Hazard Suppression Systems, NICET Level II in Fire Alarm, and a member of NFPA 75. He is a member of the Water Jet Technology Association (WJTA) safety committee for Vacuum Equipment. Has 26 plus years of experience in Special Hazard Suppression areas.
RCJ Invited Paper: Novel Methodology to Address ESD Verification Complexity of 2.5D/3D-IC Designs
Hirotaka Yamazaki
Hirotaka Yamazaki received his M.S. in Engineering from Keio University in Japan in 2007. In 2007, he joined Fujitsu Laboratories, Ltd., where he was engaged in research and development of Power Integrity analysis. Since 2015, he has been with Socionext, Inc., where he is currently engaged in investigating and developing ESD verification technology.
ESA Invited Presentation: To Be Announced
ESA Invited Presentation: To Be Announced
Author's Corner for 6A.1, 6A.2, 6A.3, 6B.1, 6B.2, 6B.3, Invited Papers
Alwyn Rebello
Alwyn Rebello received an M.Sc. degree in Physics from Cochin University of Science and Technology, Kerala, India, in 2005, and a Ph.D. degree from the National University of Singapore (NUS), Singapore, in 2011. In 2017, he joined GLOBALFOUNDRIES in Singapore, where he is involved in the development of ESD and Latchup protection for technology nodes ranging from 0.18 μm to 28nm. His current research interests include ESD device development and latch-up prevention for various automotive and RF applications.
Theo Smedes
After receiving his Ph.D. from the Eindhoven University of Technology with a thesis on compact device modeling, Theo Smedes worked at the Delft University of Technology on layout-to-circuit extraction. In 1995, he joined NXP Semiconductors (then Philips Semiconductors), working on tools for statistical design. Currently, he is an NXP Fellow for ESD and Latch-up. Theo is a member of all ESDA device testing working groups and chairs the TLP working group. He published several papers on ESD and received the 2007 Best Paper Award and the 2009, 2018, and 2022 Outstanding Paper Award of the EOS/ESD Symposium. Theo was the general chair of the EOS/ESD Symposium in 2013. He has been recognized with ESDA's David F. Barber Sr. Memorial Award (2017) and Outstanding Contribution Award (2022).
Nandha Kumar Subramani
Nandha Kumar Subramani received his PhD in Electronics Engineering from the Université de Limoges, France, in 2017, and his master's degree in Electrical and Electronics Engineering from the University of Sheffield in 2014. He has worked for GLOBALFOUNDRIES on ESD devices development and characterization, and TCAD device modeling. He has authored or co-authored several publications in the fields of GaN trap characterization, low-frequency noise measurements, TCAD-based physical simulations, and ESD device development.
Vladislav Vashchenko
Dr. Vladislav Vashchenko has been the Sr. Director, Power ESD Group at Analog Devices Corp since 2011. He is responsible for aspects of power analog ESD/Latch-up IC co-design business process and technology development. Previously, he managed ESD technology development at National Semiconductor (2000-2011). He received an MS Engineer-Physicist (1987), a Ph.D. in Physics of Semiconductors from MIPT (1990), and a "Doctor of Science in Microelectronics" habilitation degree (1997). He is the author of 150 U.S. patents, over 120 papers, and co-author of three books in the ESD field.
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
Friedrich zur Nieden
Friedrich zur Nieden received the Ph.D. degree in electrical engineering from TU Dortmund University, Germany, in 2014. From 2007 to 2012, he was a research and teaching assistant at the On-Board Systems Laboratory at TU Dortmund University. In 2010, he received a scholarship from the German Academic Exchange Service, which allowed him to stay at the University of Missouri Science and Technology in Rolla, Missouri, USA, where he continued his work in system-level ESD simulation. In 2012, he joined the central ESD department at Infineon Technologies AG in Munich, Germany. At Infineon, he works on ESD topics, focusing on characterization, device testing, ESD at the system level, and production support.
General Chairs Reception - All Attendees Invited
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.