Sunday, September 27
EOS/ESD Association, Inc. Annual Meeting & Reception - Open to All Attendees
Monday, September 28
Continental Breakfast
Registration Open
Opening Welcome
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Keynote: Deep Neural Networks and Transfer Learning: Unlocking the Potential for ESD Data Analysis and Simulations
Mehrdad Nourani
Mehrdad Nourani received a Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by the National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.
Networking Break
2027 ESDA Roadmap Update
Networking Coffee Break
1A.1 Impact of Process and Fab-to-Fab Variations to ESD Robustness of Snapback-Based ESD Protection Devices
Gianluca Boselli
Gianluca Boselli earned his MS in EE from the University of Parma (1996) and PhD from the University of Twente (2001). He joined Texas Instruments in 2001, focusing on ESD and latch-up for CMOS technologies. He currently manages TI's corporate ESD Team and directs the Advanced Technology Development University Research Program. A prolific author and speaker, he has received multiple best paper awards and the prestigious ESD Association Outstanding Contribution Award (2019). He holds 20+ patents, serves on the EOS/ESD Association Board of Directors as Chief Strategist, and is an IEEE Senior Member.
1B.1 An Empirical Approach to Predict FICDM ESD Current Waveform and Product Robustness
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.
1A.2 Mechanism of Premature ESD Failure Adjacent HV PNP ESD Device under IO-to-IO Stress
Jehoon Lee
Jehoon Lee received his B.S., M.S., and Ph.D. degrees in Electronic and Electrical Engineering from Dankook University (DKU), Korea, in 2016, 2018, and 2023, respectively. He is currently with the ESD/TCAD Team at DBHiTek. His research focuses on ESD protection design in BCD, CIS, LDI, and other processes, as well as TCAD-based device analysis.
1B.2 Modeling of ESD Diodes in the CDM Time Domain
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Authors Corner for 1A.1 & 1A.2
Gianluca Boselli
Gianluca Boselli earned his MS in EE from the University of Parma (1996) and PhD from the University of Twente (2001). He joined Texas Instruments in 2001, focusing on ESD and latch-up for CMOS technologies. He currently manages TI's corporate ESD Team and directs the Advanced Technology Development University Research Program. A prolific author and speaker, he has received multiple best paper awards and the prestigious ESD Association Outstanding Contribution Award (2019). He holds 20+ patents, serves on the EOS/ESD Association Board of Directors as Chief Strategist, and is an IEEE Senior Member.
Jehoon Lee
Jehoon Lee received his B.S., M.S., and Ph.D. degrees in Electronic and Electrical Engineering from Dankook University (DKU), Korea, in 2016, 2018, and 2023, respectively. He is currently with the ESD/TCAD Team at DBHiTek. His research focuses on ESD protection design in BCD, CIS, LDI, and other processes, as well as TCAD-based device analysis.
Authors Corner for 1B.1 and 1B.2
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.
Symposium Paper Awards Presentation Lunch
James Di Sarro
Dr. James Di Sarro received the B.S. degree (summa cum laude) in electrical engineering and economics from Duke University, Durham, NC, in 2004, and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Illinois Urbana-Champaign, Urbana, IL, in 2006 and 2009, respectively. He is currently a Member of the Group Technical Staff at Texas Instruments in Dallas, TX, working on product-level ESD protection circuit design and verification. From 2009 to 2013, he worked on ESD devices and compact model development for advanced CMOS technologies as an Advisory Engineer/Scientist at IBM Corporation. While a student, he completed several summer internships at IBM Corporation and National Semiconductor in electrostatic discharge (ESD) protection device development. He has 29 granted patents and has authored or co-authored 15 conference presentations and journal papers. Dr. Di Sarro received an IBM Ph.D. Fellowship and an EOS/ESD Symposium Best Student
Paper Award.
Alain Louiseau
Alain Loiseau received a maîtrise in Electrical Engineering from the Université des Sciences et Techniques du Languedoc, France, in 1993 and a master's in electrical engineering from the University of Virginia in 1995. He has worked for IBM, STMicro, and GLOBALFOUNDRIES on CMOS technology development and characterization, CPU power reduction, flash array functional testing, high-voltage FET reliability, and ESD. He holds over 100 US patents and has (co)-authored 13 papers.
System-Level Characterization Issues Interactive Seminar
Hans Kunz
Hans Kunz joined Texas Instruments in 2003, after nine years at Dallas Semiconductor/Maxim, and was elected Distinguished Member of Technical Staff in 2017. His past responsibilities include designing, developing, and implementing ESD protection circuits for analog CMOS and high-voltage BiCMOS technologies, as well as developing ESD verification tools and methodologies. Hans is currently focused on developing test, measurement, and design methodologies for system-level ESD protection at the IC level. Hans is a co-author of multiple publications on ESD and received the Best Presentation Award at the 2006 EOS/ESD Symposium. He holds 13 patents.
Process Assessment Interactive Seminar
Lena Zeitlhoefler
Lena Zeitlhoefler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at TUM, she worked in collaboration with Infineon Technologies AG in the fields of ESD and, in particular, on the physics of CDM and CDM simulation. She is an active member in several standardization working groups. In recent years, she was a member of the TPC for the EOSESD Symposium and for IEW Europe and Asia, and mentored several publications. She joined the global ESD team at Infineon in Munich, Germany, full-time in 2021.
Friedrich zur Nieden
Friedrich zur Nieden received the Ph.D. degree in electrical engineering from TU Dortmund University, Germany, in 2014. From 2007 to 2012, he was a research and teaching assistant at the On-Board Systems Laboratory at TU Dortmund University. In 2010, he received a scholarship from the German Academic Exchange Service, which allowed him to stay at the University of Missouri Science and Technology in Rolla, Missouri, USA, where he continued his work in system-level ESD simulation. In 2012, he joined the central ESD department at Infineon Technologies AG in Munich, Germany. At Infineon, he works on ESD topics, focusing on characterization, device testing, ESD at the system level, and production support.
Afternoon Networking Break with Refreshments
2A.1 Characterization and Benchmarking of ESD Diodes in CFET Technology
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.
M1.1 Antenna-Oscilloscope-Combinations for ESD Detection
Mohamed Chefai
Mohamed Chefai received his Master's degree in Electrical Engineering from the Technical University of Munich (TUM) in 2022. After his studies, he joined the central ESD department of Infineon Technologies AG based in Munich, Germany. In his current position at Infineon, Mohamed works on ESD engineering with a strong focus on device testing.
2A.2 Nanosheet Sub-ns ESD Endurance and I/O Circuit Co-Optimization for ESD Risk Mitigation
Tzu-Hao Chiang
Tzu-Hao Chiang received the B.S. degree in electrical engineering and the M.S. degree in electronic engineering from National Taiwan University, Taipei, Taiwan, in 2020. He joined Taiwan Semiconductor Manufacturing Company (TSMC) in 2020, where he is currently a senior engineer in the ESD/EOS Technology Department. His work focuses on single-event latch-up (SEL) and ESD victim design solution development.
M1.2 The Hazards of Plastic Bottles for Containment of Flammable Materials
David E. Swenson
David E. Swenson retired in 2003 after 35 years of service at 3M. While at 3M, he was responsible for new static control packaging material development and application, training 3M personnel worldwide, and providing application assistance to users of static control products globally, with particular emphasis on Asia Pacific and Japan. Dave and his wife, Geri, established a new company, Affinity Static Control Consulting, L.L.C., in 2003, and support clients around the world. Dave has been a member of the ESD Association since 1984 and has served in many capacities, including as the 1997 Symposium General Chair and as president of the Association in 1998 and 1999, and again in 2008 and 2009. He is currently appointed to the Board of Directors to assist with technical inquiries. Dave was presented with the ESD Association's highest award, the “Outstanding Contributions Award,” in 2002. He is an original member of the ESDA Standards Committee, serving on many Working Groups and the ANSI/ESD S20.20 Task Team. He is a member of the Electrostatic Society of America and IMAPS, and is a retired US Expert on IEC TC101, Electrostatics, after serving for more than 20 years.
2A.3 Impact of Buried Power Rails on Thin-Substrate ESD Diode Performance
Emanuele Groppo
Emanuele Groppo received his B.Sc. (2020) and M.Sc. (2022) in Electronic Engineering from Politecnico di Torino, Italy. He is currently pursuing a Ph.D. at the Technical University of Munich (TUM), Chair of Circuit Design. In 2023, he joined the ESD team at Intel in Munich, Germany. The focus of his research is on novel ESD devices and solutions for advanced semiconductor technologies.
M1.3 Risk Assessment of Processes with Printed Circuit Boards
Kai Esmark
Kai has experience in the field of ESD and EOS for more than 25 years. He is Senior Principal for "Overvoltage robust design" in the Power and Sensor Solution business group of Infineon in Munich (Germany). In his role, he oversees the development of robustness concepts against electrically related threat scenarios at the IC and system levels. He also acts as a consultant at Infineon regarding EOS (better: EIPD)- related field returns, supporting root cause analysis. Kai contributes to the development of standard practice documents in the Automotive Industry, addressing semiconductor devices exhibiting signs of electrical overstress. These activities are in close cooperation with USCAR (United States Council for Automotive Research) and VDA (German Association of the Automotive Industry).
Authors Corner for 2A.1, 2A.2, and 2A.3
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.
Tzu-Hao Chiang
Tzu-Hao Chiang received the B.S. degree in electrical engineering and the M.S. degree in electronic engineering from National Taiwan University, Taipei, Taiwan, in 2020. He joined Taiwan Semiconductor Manufacturing Company (TSMC) in 2020, where he is currently a senior engineer in the ESD/EOS Technology Department. His work focuses on single-event latch-up (SEL) and ESD victim design solution development.
Emanuele Groppo
Emanuele Groppo received his B.Sc. (2020) and M.Sc. (2022) in Electronic Engineering from Politecnico di Torino, Italy. He is currently pursuing a Ph.D. at the Technical University of Munich (TUM), Chair of Circuit Design. In 2023, he joined the ESD team at Intel in Munich, Germany. The focus of his research is on novel ESD devices and solutions for advanced semiconductor technologies.
Authors Corner for M1.1, M1.2, and M1.3
Mohamed Chefai
Mohamed Chefai received his Master's degree in Electrical Engineering from the Technical University of Munich (TUM) in 2022. After his studies, he joined the central ESD department of Infineon Technologies AG based in Munich, Germany. In his current position at Infineon, Mohamed works on ESD engineering with a strong focus on device testing.
Kai Esmark
Kai has experience in the field of ESD and EOS for more than 25 years. He is Senior Principal for "Overvoltage robust design" in the Power and Sensor Solution business group of Infineon in Munich (Germany). In his role, he oversees the development of robustness concepts against electrically related threat scenarios at the IC and system levels. He also acts as a consultant at Infineon regarding EOS (better: EIPD)- related field returns, supporting root cause analysis. Kai contributes to the development of standard practice documents in the Automotive Industry, addressing semiconductor devices exhibiting signs of electrical overstress. These activities are in close cooperation with USCAR (United States Council for Automotive Research) and VDA (German Association of the Automotive Industry).
David E. Swenson
David E. Swenson retired in 2003 after 35 years of service at 3M. While at 3M, he was responsible for new static control packaging material development and application, training 3M personnel worldwide, and providing application assistance to users of static control products globally, with particular emphasis on Asia Pacific and Japan. Dave and his wife, Geri, established a new company, Affinity Static Control Consulting, L.L.C., in 2003, and support clients around the world. Dave has been a member of the ESD Association since 1984 and has served in many capacities, including as the 1997 Symposium General Chair and as president of the Association in 1998 and 1999, and again in 2008 and 2009. He is currently appointed to the Board of Directors to assist with technical inquiries. Dave was presented with the ESD Association's highest award, the “Outstanding Contributions Award,” in 2002. He is an original member of the ESDA Standards Committee, serving on many Working Groups and the ANSI/ESD S20.20 Task Team. He is a member of the Electrostatic Society of America and IMAPS, and is a retired US Expert on IEC TC101, Electrostatics, after serving for more than 20 years.
Year in Review: ESD Protection Challenges and Strategies in Advanced CMOS Technologies
Wen-Chieh Chen
Wen-Chieh Chen received the B.S and M.S. degrees in electronics engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 2016 and 2018, respectively, and the Ph.D. degree from the Electrical Engineering Department (ESAT), Katholieke Universiteit Leuven (KU Leuven), Leuven, Belgium, in 2024. She joined the ESD team, imec, Leuven, Belgium, in 2019. Her current research interests include mixed-voltage I/O design and ESD characterization in advanced sub-5-nm technologies, 3D/2.5D ICs, and the DTCO/STCO scaling roadmap.