Monday, September 28
1B.1 An Empirical Approach to Predict FICDM ESD Current Waveform and Product Robustness
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.
1B.2 Modeling of ESD Diodes in the CDM Time Domain
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Authors Corner for 1B.1 and 1B.2
Weiying Li
Weiying Li received her M.S. degree in Millimeter Wave and Solid State Electronics from the University of California, Davis, USA, in 2000. She began her career in Motorola's semiconductor division, which later became Freescale Semiconductor in 2004 and subsequently NXP Semiconductors in 2016. Her technical work focused on advanced ESD device modeling, failure mechanism analysis, and simulation to support product quality root-cause investigations. Her additional interests included EMC/ICIM behavioral modeling, substrate noise modeling, and predictive analysis for mixed-signal and RF SoC platforms. She is currently with NXP's Technology and Quality Solutions organization in Beijing, China, specializing in ESD compact modeling and SPICE level model development. She is also a member of the Si2 CMC ASM ESD diode model workgroup and the ESD FET model workgroup.
Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. degree from the Department of Electronics Engineering and his M.S. degree from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2015. He worked at NXP Semiconductors, Austin, TX, from 2015 to 2021. He has been with Silicon Laboratories, Austin, TX, since 2021. His research interests include ESD protection network design, I/O library architecture, and CAD/EDA development for SoC integration and ESD/latch-up design verification.