Monday, September 16

8:30 AM
8:30 AM - 9:20 AM PDT

KEYNOTE: Memory Technology Advancements Driving High Performance, Reliable Systems

Memory technologies, particularly DRAM and NAND, have been critical in enabling advanced computing systems. With rapid advancements in high-performance computing (HPC), generative AI (GenAI), natural language processing (NLP), and related technologies/services, the demand for data collection, storage, and processing has significantly increased the need for memory products to deliver high performance – speed, bandwidth, and high density at low cost. These opportunities for significant growth are coming at a time when scaling challenges are increasing in both DRAM and NAND technologies. Innovations in exploiting the vertical dimension with 3D structures, hybrid bonding, and hetero-integration with advanced packaging technologies are pushing the roadmap. The performance needs, and the memory bandwidth and memory sizes are just growing exponentially so that the training time needed for large language models like GPT-4 can be reduced. These advancements should also consider the need to ensure high reliability at all levels – including ESD and EOS protection. This talk will outline scaling challenges, the need for continued innovation, and the importance of design/system technology co-optimizations to meet these challenging requirements.

Chandra Mouli

Chandra Mouli

Vice President, Device Technology R&D
Micron Technology, Inc.

Chandra Mouli is with Micron Technology Inc., Boise, ID, USA. He is currently Vice President of Device Technology R&D with responsibilities in the areas of device characterization, reliability analysis, compact models, test structure design, process & device modeling for all technologies under development in R&D. He received his undergraduate degree in Physics and MSEE from the Indian Institute of Science (IISc), Bangalore, India and Ph.D. (EE) from the University of Texas at Austin in 1994. He has previously worked at Texas Instruments Inc. He was a visiting scholar (VSRP program) at the Tata Institute of Fundamental Research (TIFR) and has been an intern at the Defense Electronics Application Lab (DEAL) in Dehra Dun. His interests include semiconductor devices and process technology for advanced memory, optoelectronic devices, and exploratory research in the area of new materials and device structures. He has ~500 issued patents and several pending in various areas of semiconductor devices and processes – in advanced memory, novel exploratory devices, image sensors, high-speed interconnects, and related technologies. He has served on the technical committees for various conferences, including IEDM, IRPS, and SISPAD. He has also served on the review committees for NSF and SRC and as an editor for IEEE Electron Device Letters (EDL).

KEYNOTE: Memory Technology Advancements Driving High Performance, Reliable Systems