Agenda

In 2005, Dr. Mirko Scholz received his Diploma-Engineer (FH) degree in Electrical Engineering from the University of Applied Sciences in Zwickau, Germany. In 2013, Dr. Mirko Scholz received his PhD degree in Electrical Engineering from the Vrije Universiteit in Brussels (VUB), Belgium. From 2005 until 2017, he was working as an ESD researcher in different R&D programs at imec in Leuven, Belgium. From March 2017 until June 2019, he was a program manager in the imec academy and in imec's process technology transfer activities. Since July 2019, he has been with Infineon Technologies in Munich, Germany, where he is a Principal Engineer ESD Development. His daily work focuses on component- and system-level ESD protection design for RF, security, and automotive product lines at Infineon. Since 2007, he has been an active member of different working groups in the ESD Association (ESDA) standards committee, currently co-chairing WG 5.6 (Human Metal Model). He was the management chair of the 2018 International ESD Workshop (IEW) in Belgium. Since 2019, he has been a member of the steering committee of the EOS/ESD Symposium. In this function was the Technical Program Committee (TPC) chair of the 2023 EOS/ESD Symposium. For the 2017-2019 term and again for the 2022-2024 term he has been an elected member of the ESDA Board of Directors. Since 2017, he is leading as a business unit manager the Advanced Topics committee of the ESDA. He has authored/co-authored more than 100 publications, tutorials, and patents in the field of ESD protection design and testing. He is co-author of the 2014 Springer book "System-level ESD protection". He is a regular reviewer for several IEEE journals and a current member of the IRPS sub-committee on ESD and Latchup.

Myung-Hee Na is currently the Vice President and Technology Systems General Manager in Intel, USA. Over 20 years, she has been known as the semiconductor technologist and held various executive positions in global semiconductor companies including US, Belgium and Korea. She has been very diverse and deep semiconductor experiences from device to designs including logic and memory technologies over 20 years.   Prior to joining Intel in April 2024, over the past three years she was Vice President of the Revolutionary Technology Center in SK Hynix, Korea. In this role she was responsible for multi-decade semiconductor research roadmaps and strategies for memory centric and emerging computing domains such as emerging memory, and beyond memory.
From 2019-2023, Myung-Hee also worked at imec in Belgium where she was Vice President, Technology Solutions and Enablement. In this role she was responsible for overall 10-year research strategies for CMOS pathfinding and emerging computing domains such as edge computing. After completing her Ph.D. in Physics, Dr. Na started her career at IBM in 2001, where she held various technical, managerial and executive roles until early 2019. During that time, she was promoted to Distinguished Engineer and Technical Executive. At IBM Research, she successfully led Research and Development for multiple generations of semiconductor technologies, including high-K metal gate, FinFET, and Nanosheet development. Moreover, she has co-authored numerous research papers and U.S. and international patents.

In 2005, Dr. Mirko Scholz received his Diploma-Engineer (FH) degree in Electrical Engineering from the University of Applied Sciences in Zwickau, Germany. In 2013, Dr. Mirko Scholz received his PhD degree in Electrical Engineering from the Vrije Universiteit in Brussels (VUB), Belgium. From 2005 until 2017, he was working as an ESD researcher in different R&D programs at imec in Leuven, Belgium. From March 2017 until June 2019, he was a program manager in the imec academy and in imec's process technology transfer activities. Since July 2019, he has been with Infineon Technologies in Munich, Germany, where he is a Principal Engineer ESD Development. His daily work focuses on component- and system-level ESD protection design for RF, security, and automotive product lines at Infineon. Since 2007, he has been an active member of different working groups in the ESD Association (ESDA) standards committee, currently co-chairing WG 5.6 (Human Metal Model). He was the management chair of the 2018 International ESD Workshop (IEW) in Belgium. Since 2019, he has been a member of the steering committee of the EOS/ESD Symposium. In this function was the Technical Program Committee (TPC) chair of the 2023 EOS/ESD Symposium. For the 2017-2019 term and again for the 2022-2024 term he has been an elected member of the ESDA Board of Directors. Since 2017, he is leading as a business unit manager the Advanced Topics committee of the ESDA. He has authored/co-authored more than 100 publications, tutorials, and patents in the field of ESD protection design and testing. He is co-author of the 2014 Springer book "System-level ESD protection". He is a regular reviewer for several IEEE journals and a current member of the IRPS sub-committee on ESD and Latchup.

Matteo Meneghini received his PhD (University of Padova) working on the optimization of GaN-based LED and laser structures.
He is now a full professor at the Department of Information Engineering at the University of Padova. His main interests are the characterization, reliability, and modeling of compound semiconductor devices (LEDs, laser diodes, HEMTs) and optoelectronic components, including solar cells. He has published more than 400 journal and conference proceedings papers related to these activities.
During his career, he has cooperated and/or co-published with several semiconductor companies and research centers. He has been elected IEEE Fellow (Class of 2025). He and his colleagues have won several best paper awards at international conferences.

In 2005, Dr. Mirko Scholz received his Diploma-Engineer (FH) degree in Electrical Engineering from the University of Applied Sciences in Zwickau, Germany. In 2013, Dr. Mirko Scholz received his PhD degree in Electrical Engineering from the Vrije Universiteit in Brussels (VUB), Belgium. From 2005 until 2017, he was working as an ESD researcher in different R&D programs at imec in Leuven, Belgium. From March 2017 until June 2019, he was a program manager in the imec academy and in imec's process technology transfer activities. Since July 2019, he has been with Infineon Technologies in Munich, Germany, where he is a Principal Engineer ESD Development. His daily work focuses on component- and system-level ESD protection design for RF, security, and automotive product lines at Infineon. Since 2007, he has been an active member of different working groups in the ESD Association (ESDA) standards committee, currently co-chairing WG 5.6 (Human Metal Model). He was the management chair of the 2018 International ESD Workshop (IEW) in Belgium. Since 2019, he has been a member of the steering committee of the EOS/ESD Symposium. In this function was the Technical Program Committee (TPC) chair of the 2023 EOS/ESD Symposium. For the 2017-2019 term and again for the 2022-2024 term he has been an elected member of the ESDA Board of Directors. Since 2017, he is leading as a business unit manager the Advanced Topics committee of the ESDA. He has authored/co-authored more than 100 publications, tutorials, and patents in the field of ESD protection design and testing. He is co-author of the 2014 Springer book "System-level ESD protection". He is a regular reviewer for several IEEE journals and a current member of the IRPS sub-committee on ESD and Latchup.

Ruilong Xie (Senior Member, IEEE) received his Bachelor of Engineering degree in 2006 and Ph.D. degree in 2010 in Electrical and Computer Engineering from the National University of Singapore (NUS). During his Ph.D., he worked in the Silicon Nano Device Laboratory at NUS and was associated with the Institute of Microelectronics, Agency for Science, Technology and Research, Singapore. His doctoral research focused on high-mobility germanium channel MOSFETs with high-k gate dielectrics. In 2009, Ruilong joined Chartered Semiconductor Manufacturing in Singapore, where he contributed to the development of 45nm and 55nm CMOS technologies. He later moved to the GLOBALFOUNDRIES Research division in Albany, NY, working on advanced FinFET technologies (14nm, 10nm, and 7nm FinFET nodes) as part of the IBM Technology Development Alliances. Since 2018, Ruilong has been with IBM Research, focusing on advanced technology nodes, including nanosheet transistors, vertical transistors, and backside interconnect technologies. He holds more than 1,000 U.S. patents and has authored or co-authored over 30 conference and journal papers.