Monday, October 2
Invited Talk: Transmission Line Pulse Testing - 5 Years in Review

Theo Smedes
Theo Smedes received his M.Sc. and Ph.D. from the Eindhoven University of Technology in 1986 and 1991, with theses on compact device modeling. After he received his Ph.D., he worked at the Delft University of Technology on layout-to-circuit extraction with a focus on substrate coupling. In 1995 he joined NXP Semiconductors (Philips Semiconductors at that time), working on the development of tools for statistical design for submicron CMOS processes. In 2000 he switched to the field of ESD. Currently, he is NXP Fellow for ESD and Latch-up. He published several papers on ESD and introduced an ESD design course within NXP. Theo is a member of all ESDA device testing working groups and is chair of the TLP working group. He received the 2007 Best Paper Award and the 2009 and 2018 Outstanding Paper Awards of the EOS/ESD Symposium. In 2017 he has been recognized with the ESDA’s David F. Barber Sr. Memorial Award, and in 2022, with the ESDA Outstanding Contributions Award. Theo was a member of technical program committees of the EOS/ESD Symposium, IEW, IEDM, IRPS, IPFA, and the ESREF. He served as TPC chair, vice general chair, and general chair of the EOS/ESD Symposium from 2011 to 2013.
Invited Talk: Transmission Line Pulse Testing - 5 Years in Review
1A.1 Sensor Gap TLP: Expanding Time Resolution and Pulse Duration Beyond Conventional Values of Standard and Very Fast Transmission Line Pulsing

Dennis Helmut
Dennis Helmut received a B.Sc. (2014), M.Sc. (2016), and Ph.D.(2022) in electrical engineering from Technical University Munich. Since his master's thesis, he is actively working with ESD testing techniques with a focus on TLP testing. In 2016 he also joined the Institute for Physics, Electrical Engineering, and Automation Technology of the University of the Bundeswehr Munich. His focus changed to new fast characterization techniques for the ESD and Power Electronics domain there.
1A.1 Sensor Gap TLP: Expanding Time Resolution and Pulse Duration Beyond Conventional Values of Standard and Very Fast Transmission Line Pulsing
1A.2 ESD Stress Data Analysis with Machine Learning: A Case Study

Mehrdad Nourani
Mehrdad Nourani received his Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, and machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.
1A.2 ESD Stress Data Analysis with Machine Learning: A Case Study
Authors Corner for 1A.1 & 1A.2

Dennis Helmut
Dennis Helmut received a B.Sc. (2014), M.Sc. (2016), and Ph.D.(2022) in electrical engineering from Technical University Munich. Since his master's thesis, he is actively working with ESD testing techniques with a focus on TLP testing. In 2016 he also joined the Institute for Physics, Electrical Engineering, and Automation Technology of the University of the Bundeswehr Munich. His focus changed to new fast characterization techniques for the ESD and Power Electronics domain there.

Mehrdad Nourani
Mehrdad Nourani received his Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, and machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.
Authors Corner for 1A.1 & 1A.2
1A.3 Novel ESD Characterization Method for Bipolar Devices Using a Combined TLP System with Dynamic Base Bias

Filippo Magrini
Filippo Magrini was born in Parma, Italy. He received his M. Sc. in electronic engineering from the "Universitá degli Studi di Parma” in 2007. In 2008, he joined the automotive power technology development department of Infineon Technologies, where he has been responsible for the development of ESD protection devices and concepts in advanced Smart Power technologies. In recent years, his focus has addressed reverse engineering topics, the development of HV-SCRs, and the investigation of power MOSFETs' dynamic behavior. His responsibilities also cover the support of design teams with respect to the implementation of robust on-chip ESD protection design.
1A.3 Novel ESD Characterization Method for Bipolar Devices Using a Combined TLP System with Dynamic Base Bias
1A.4 Impact of a Deep Junction Depth Coupled with a Short Channel Length on the ESD Robustness of a Grounded Gate nMOS Clamp

Casey Hopper
Casey Hopper currently works as a device engineer at Texas Instruments, working on TI's general-purpose and high-performance bipolar technologies. Since joining TI full-time in 2020, he has spent time working as an ESD TCAD engineer focusing on ESD failure analysis and TCAD automation, as well as an electrical characterization engineer within TI's technology transfer team. He has a Master's in Electrical Engineering from the University of Texas at Dallas.
1A.4 Impact of a Deep Junction Depth Coupled with a Short Channel Length on the ESD Robustness of a Grounded Gate nMOS Clamp
Authors Corner for 1A.3 & 1A.4

Casey Hopper
Casey Hopper currently works as a device engineer at Texas Instruments, working on TI's general-purpose and high-performance bipolar technologies. Since joining TI full-time in 2020, he has spent time working as an ESD TCAD engineer focusing on ESD failure analysis and TCAD automation, as well as an electrical characterization engineer within TI's technology transfer team. He has a Master's in Electrical Engineering from the University of Texas at Dallas.

Filippo Magrini
Filippo Magrini was born in Parma, Italy. He received his M. Sc. in electronic engineering from the "Universitá degli Studi di Parma” in 2007. In 2008, he joined the automotive power technology development department of Infineon Technologies, where he has been responsible for the development of ESD protection devices and concepts in advanced Smart Power technologies. In recent years, his focus has addressed reverse engineering topics, the development of HV-SCRs, and the investigation of power MOSFETs' dynamic behavior. His responsibilities also cover the support of design teams with respect to the implementation of robust on-chip ESD protection design.
Authors Corner for 1A.3 & 1A.4
1A.5 Discharge Waveforms of Emulated Die-to-Die ESD Discharges

Harald Gossner
Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich, in 1990 and his Ph.D. in electrical engineering from Universität der Bundeswehr, Munich, in 1995. For 15 years, he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD activities for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 110 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association, Inc. for his contributions to the field of ESD. He is the co-founder and co-chair of the Industry Council on ESD Target Levels. Currently, he represents EOS/ESD Association, Inc. as president and editor of IEEE EDL. Harald Gossner is an IEEE Fellow.
1A.5 Discharge Waveforms of Emulated Die-to-Die ESD Discharges
1A.6 Voltage to Current Correlation for CDM Testing

Lena Zeitlhöfler
Lena Zeitlhöfler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at the TUM, she worked in cooperation with Infineon Technologies AG in the fields of ESD and, particularly, on the physics of CDM and CDM simulation. She joined the ESD Team of Infineon in Munich, Germany, full-time in September 2021.
1A.6 Voltage to Current Correlation for CDM Testing
1A.7 Study of Frequency Response of CDM Setup

Jared Floyd
Jared R. Floyd received a B.S. in Electrical Engineering from Missouri University of Science & Technology, Rolla, Missouri, USA, in 2021. He is an Applications & Design Engineer at ESDEMC Technology, LLC developing automated ESD solutions and conducting data analysis for the company's research. His research interests include signal processing, data analysis, signal integrity, RF measurement, and time-frequency analysis.
1A.7 Study of Frequency Response of CDM Setup
Authors Corner 1A.5, 1A.6, & 1A.7

Jared Floyd
Jared R. Floyd received a B.S. in Electrical Engineering from Missouri University of Science & Technology, Rolla, Missouri, USA, in 2021. He is an Applications & Design Engineer at ESDEMC Technology, LLC developing automated ESD solutions and conducting data analysis for the company's research. His research interests include signal processing, data analysis, signal integrity, RF measurement, and time-frequency analysis.

Lena Zeitlhöfler
Lena Zeitlhöfler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at the TUM, she worked in cooperation with Infineon Technologies AG in the fields of ESD and, particularly, on the physics of CDM and CDM simulation. She joined the ESD Team of Infineon in Munich, Germany, full-time in September 2021.

Harald Gossner
Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich, in 1990 and his Ph.D. in electrical engineering from Universität der Bundeswehr, Munich, in 1995. For 15 years, he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD activities for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 110 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association, Inc. for his contributions to the field of ESD. He is the co-founder and co-chair of the Industry Council on ESD Target Levels. Currently, he represents EOS/ESD Association, Inc. as president and editor of IEEE EDL. Harald Gossner is an IEEE Fellow.
Authors Corner 1A.5, 1A.6, & 1A.7
Wednesday, October 4
5A.3 A Hybrid Finite Difference Model for Open Base Transistors with Kirk Effect

Steffen Holland
Steffen Holland works at Nexperia Semiconductors in Hamburg. He received his Ph.D. in physics at the University of Hamburg, Germany, in 2004. He worked as a member of the research staff at the university until 2005. Afterward he joined the process development group of Philips Semiconductors in Hamburg. Process and device simulations of discrete semiconductor devices, including ESD and surge protection, quickly became the focus of his work. In 2017 he became a system architect for ESD protection devices.
5A.3 A Hybrid Finite Difference Model for Open Base Transistors with Kirk Effect
5A.4 Physics-Based Compact Model of N-Well ESD Diodes

Shudong Huang
Shudong Huang is a Ph.D. student in the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign. His research interests include the design of broadband ESD protection devices and circuits for high-speed wireline circuits and RFIC in advanced CMOS technologies and compact modeling of ESD devices.
5A.4 Physics-Based Compact Model of N-Well ESD Diodes
5A.5 Effective ESD Design Through PERC Programming

Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. from the Department of Electronics Engineering and his M.S. from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2010. He worked at Freescale Semiconductor/NXP, Austin, TX, from 2015 to 2021. He joined Silicon Laboratories, Inc., Austin, TX, in 2021. His research interests include ESD protection network design, I/O library architecture, CAD/EDA for SoC integration, and ESD/latch-up sign-off review.
5A.5 Effective ESD Design Through PERC Programming
Authors Corner 5A.3, 5A.4, & 5A.5

Shudong Huang
Shudong Huang is a Ph.D. student in the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign. His research interests include the design of broadband ESD protection devices and circuits for high-speed wireline circuits and RFIC in advanced CMOS technologies and compact modeling of ESD devices.

Kuo-Hsuan Meng
Kuo-Hsuan Meng received his B.S. from the Department of Electronics Engineering and his M.S. from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2010. He worked at Freescale Semiconductor/NXP, Austin, TX, from 2015 to 2021. He joined Silicon Laboratories, Inc., Austin, TX, in 2021. His research interests include ESD protection network design, I/O library architecture, CAD/EDA for SoC integration, and ESD/latch-up sign-off review.

Steffen Holland
Steffen Holland works at Nexperia Semiconductors in Hamburg. He received his Ph.D. in physics at the University of Hamburg, Germany, in 2004. He worked as a member of the research staff at the university until 2005. Afterward he joined the process development group of Philips Semiconductors in Hamburg. Process and device simulations of discrete semiconductor devices, including ESD and surge protection, quickly became the focus of his work. In 2017 he became a system architect for ESD protection devices.
Authors Corner 5A.3, 5A.4, & 5A.5
5A.1 A Combined Model for Transient and Self-Heating of Snapback Type ESD Protection Devices

Xin Yan
Xin Yan received a B.S. in Applied Physics from Beihang University, Beijing, China, in 2015 and an M.S. in Electrical Engineering from Missouri University of Science and Technology, Rolla, USA, in 2018. He is currently working toward a Ph.D. at the Electromagnetic Compatibility Laboratory, Missouri University of Science and Technology, Rolla, USA. His research interests include ESD, EMI, and desense analysis.
5A.1 A Combined Model for Transient and Self-Heating of Snapback Type ESD Protection Devices
5A.2 A Versatile Behavioral Snapback ESD Model Incorporating Transient Effects and Failure Detection

Michael Ammer
Michael Ammer received a B.Eng in mechatronics in 2013 and an MSc in electrical engineering in 2015, both from OTH Regensburg, Regensburg, Germany. In 2020 he received a Ph.D. in electrical engineering from the University of the Federal Armed Forces Munich, Germany. From 2013 to 2015, he was with the sensors advanced development group of Continental Automotive as a working student. Afterward, he joined Infineon Technologies in Munich, Germany, to work on ESD robust systems. His research interests include automotive electronics, ESD protection design, semiconductor physics, system simulation, high-frequency measurement techniques, and transient behavioral modeling of integrated circuits.
5A.2 A Versatile Behavioral Snapback ESD Model Incorporating Transient Effects and Failure Detection
Authors Corner 5A.1 & 5A.2

Michael Ammer
Michael Ammer received a B.Eng in mechatronics in 2013 and an MSc in electrical engineering in 2015, both from OTH Regensburg, Regensburg, Germany. In 2020 he received a Ph.D. in electrical engineering from the University of the Federal Armed Forces Munich, Germany. From 2013 to 2015, he was with the sensors advanced development group of Continental Automotive as a working student. Afterward, he joined Infineon Technologies in Munich, Germany, to work on ESD robust systems. His research interests include automotive electronics, ESD protection design, semiconductor physics, system simulation, high-frequency measurement techniques, and transient behavioral modeling of integrated circuits.

Xin Yan
Xin Yan received a B.S. in Applied Physics from Beihang University, Beijing, China, in 2015 and an M.S. in Electrical Engineering from Missouri University of Science and Technology, Rolla, USA, in 2018. He is currently working toward a Ph.D. at the Electromagnetic Compatibility Laboratory, Missouri University of Science and Technology, Rolla, USA. His research interests include ESD, EMI, and desense analysis.