Monday, October 2
Impact of Parasitic PCB and EMI Filter Inductances on System-level ESD Protection (German ESD Forum E.V. Best Paper)
Impact of Parasitic PCB and EMI Filter Inductances on System-level ESD Protection (German ESD Forum E.V. Best Paper)
Invited Paper: Modeling an ESD Gun Discharge to a USB Cable
Invited Paper: Modeling an ESD Gun Discharge to a USB Cable
Invited Paper: Measurement of Current Waveform Due to Different Load of ESD Gun, TLP-HMM, and CR-HMM
Masahiro Yoshida
Masahiro Yoshida received his BE and ME in electrical and mechanical engineering from the Nagoya Institute of Technology, Nagoya, Japan, in 2021 and 2023, respectively. He is currently pursuing his Ph.D. in engineering at the Nagoya Institute of Technology. His research interests include electromagnetic compatibility (EMC) of electronic circuits and EMC testing of in-vehicle devices.
Invited Paper: Measurement of Current Waveform Due to Different Load of ESD Gun, TLP-HMM, and CR-HMM
1B.1 IEC ESD Co-Design Methodology for On-Chip Protection at High Voltage Transceivers
Dimitrios Kontos
Dimitrios Kontos is currently a senior principal engineer at Analog Devices (previously Maxim Integrated). He joined Maxim in 2010, working on ESD and latch-up co-design activities for analog ICs built-in BCD technologies. Prior to Maxim, he worked for nVidia Corporation and was responsible for the ESD and latch-up success of the company's chips. He started his career at IBM Microelectronics. First, he joined as a student with his research on ESD and electromigration of copper interconnects. After completing his MSEE at George Mason University, he became part of IBM's ESD/latch-up development group.
1B.1 IEC ESD Co-Design Methodology for On-Chip Protection at High Voltage Transceivers
1B.2 On the Safety Distance to Avoid Transient Latch-up During System Level ESD Stress
Guido Quax
Guido Quax received an MSc and Ph.D. in Applied Physics at the Eindhoven University of Technology in 2003 and 2008, respectively. His Ph.D. research focused on the electrical and optical properties of III-V semiconductor quantum dots. After graduation, he worked in the field of optical properties of soft matter at Philips Research. He joined the ESD team of NXP Semiconductors in 2012, focusing on high voltage and power applications. He has an interest in the experiments and modeling of parasitic bipolars and thyristors in Silicon.
1B.2 On the Safety Distance to Avoid Transient Latch-up During System Level ESD Stress
Authors Corner 1B.1 & 1B.2
Dimitrios Kontos
Dimitrios Kontos is currently a senior principal engineer at Analog Devices (previously Maxim Integrated). He joined Maxim in 2010, working on ESD and latch-up co-design activities for analog ICs built-in BCD technologies. Prior to Maxim, he worked for nVidia Corporation and was responsible for the ESD and latch-up success of the company's chips. He started his career at IBM Microelectronics. First, he joined as a student with his research on ESD and electromigration of copper interconnects. After completing his MSEE at George Mason University, he became part of IBM's ESD/latch-up development group.
Guido Quax
Guido Quax received an MSc and Ph.D. in Applied Physics at the Eindhoven University of Technology in 2003 and 2008, respectively. His Ph.D. research focused on the electrical and optical properties of III-V semiconductor quantum dots. After graduation, he worked in the field of optical properties of soft matter at Philips Research. He joined the ESD team of NXP Semiconductors in 2012, focusing on high voltage and power applications. He has an interest in the experiments and modeling of parasitic bipolars and thyristors in Silicon.