Agenda

Theo Smedes received his M.Sc. and Ph.D. from the Eindhoven University of Technology in 1986 and 1991, with theses on compact device modeling. After he received his Ph.D., he worked at the Delft University of Technology on layout-to-circuit extraction with a focus on substrate coupling. In 1995 he joined NXP Semiconductors (Philips Semiconductors at that time), working on the development of tools for statistical design for submicron CMOS processes. In 2000 he switched to the field of ESD. Currently, he is NXP Fellow for ESD and Latch-up. He published several papers on ESD and introduced an ESD design course within NXP. Theo is a member of all ESDA device testing working groups and is chair of the TLP working group. He received the 2007 Best Paper Award and the 2009 and 2018 Outstanding Paper Awards of the EOS/ESD Symposium. In 2017 he has been recognized with the ESDA’s David F. Barber Sr. Memorial Award, and in 2022, with the ESDA Outstanding Contributions Award. Theo was a member of technical program committees of the EOS/ESD Symposium, IEW, IEDM, IRPS, IPFA, and the ESREF. He served as TPC chair, vice general chair, and general chair of the EOS/ESD Symposium from 2011 to 2013.

Dennis Helmut received a B.Sc. (2014), M.Sc. (2016), and Ph.D.(2022) in electrical engineering from Technical University Munich. Since his master's thesis, he is actively working with ESD testing techniques with a focus on TLP testing. In 2016 he also joined the Institute for Physics, Electrical Engineering, and Automation Technology of the University of the Bundeswehr Munich. His focus changed to new fast characterization techniques for the ESD and Power Electronics domain there.

Mehrdad Nourani received his Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, and machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.

Dennis Helmut received a B.Sc. (2014), M.Sc. (2016), and Ph.D.(2022) in electrical engineering from Technical University Munich. Since his master's thesis, he is actively working with ESD testing techniques with a focus on TLP testing. In 2016 he also joined the Institute for Physics, Electrical Engineering, and Automation Technology of the University of the Bundeswehr Munich. His focus changed to new fast characterization techniques for the ESD and Power Electronics domain there.

Mehrdad Nourani received his Ph.D. in computer engineering from Case Western Reserve University, Cleveland, Ohio. He joined the University of Texas at Dallas in 1999, where he is currently a Professor of Electrical & Computer Engineering and Associate Provost. Dr. Nourani's research interests include system-on-chip design & test, design for reliability, signal/image processing, and machine learning for risk assessment and prediction for mission-critical devices and systems. His research has been supported by National Science Foundation, Semiconductor Research Corporation, and industry. Dr. Nourani holds seven utility patents and has published more than 300 papers in peer-reviewed journals and conference proceedings.

Filippo Magrini was born in Parma, Italy. He received his M. Sc. in electronic engineering from the "Universitá degli Studi di Parma” in 2007. In 2008, he joined the automotive power technology development department of Infineon Technologies, where he has been responsible for the development of ESD protection devices and concepts in advanced Smart Power technologies. In recent years, his focus has addressed reverse engineering topics, the development of HV-SCRs, and the investigation of power MOSFETs' dynamic behavior. His responsibilities also cover the support of design teams with respect to the implementation of robust on-chip ESD protection design.

Casey Hopper currently works as a device engineer at Texas Instruments, working on TI's general-purpose and high-performance bipolar technologies. Since joining TI full-time in 2020, he has spent time working as an ESD TCAD engineer focusing on ESD failure analysis and TCAD automation, as well as an electrical characterization engineer within TI's technology transfer team. He has a Master's in Electrical Engineering from the University of Texas at Dallas.

Casey Hopper currently works as a device engineer at Texas Instruments, working on TI's general-purpose and high-performance bipolar technologies. Since joining TI full-time in 2020, he has spent time working as an ESD TCAD engineer focusing on ESD failure analysis and TCAD automation, as well as an electrical characterization engineer within TI's technology transfer team. He has a Master's in Electrical Engineering from the University of Texas at Dallas.

Filippo Magrini was born in Parma, Italy. He received his M. Sc. in electronic engineering from the "Universitá degli Studi di Parma” in 2007. In 2008, he joined the automotive power technology development department of Infineon Technologies, where he has been responsible for the development of ESD protection devices and concepts in advanced Smart Power technologies. In recent years, his focus has addressed reverse engineering topics, the development of HV-SCRs, and the investigation of power MOSFETs' dynamic behavior. His responsibilities also cover the support of design teams with respect to the implementation of robust on-chip ESD protection design.

Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich, in 1990 and his Ph.D. in electrical engineering from Universität der Bundeswehr, Munich, in 1995. For 15 years, he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD activities for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 110 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association, Inc. for his contributions to the field of ESD. He is the co-founder and co-chair of the Industry Council on ESD Target Levels. Currently, he represents EOS/ESD Association, Inc. as president and editor of IEEE EDL. Harald Gossner is an IEEE Fellow.

Lena Zeitlhöfler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at the TUM, she worked in cooperation with Infineon Technologies AG in the fields of ESD and, particularly, on the physics of CDM and CDM simulation. She joined the ESD Team of Infineon in Munich, Germany, full-time in September 2021.

Jared R. Floyd received a B.S. in Electrical Engineering from Missouri University of Science & Technology, Rolla, Missouri, USA, in 2021. He is an Applications & Design Engineer at ESDEMC Technology, LLC developing automated ESD solutions and conducting data analysis for the company's research. His research interests include signal processing, data analysis, signal integrity, RF measurement, and time-frequency analysis.

Jared R. Floyd received a B.S. in Electrical Engineering from Missouri University of Science & Technology, Rolla, Missouri, USA, in 2021. He is an Applications & Design Engineer at ESDEMC Technology, LLC developing automated ESD solutions and conducting data analysis for the company's research. His research interests include signal processing, data analysis, signal integrity, RF measurement, and time-frequency analysis.

Lena Zeitlhöfler received her Master's degree in Electrical Engineering in 2017 from the Technical University of Munich (TUM). During her time as a Ph.D. student at the TUM, she worked in cooperation with Infineon Technologies AG in the fields of ESD and, particularly, on the physics of CDM and CDM simulation. She joined the ESD Team of Infineon in Munich, Germany, full-time in September 2021.

Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich, in 1990 and his Ph.D. in electrical engineering from Universität der Bundeswehr, Munich, in 1995. For 15 years, he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD activities for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 110 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association, Inc. for his contributions to the field of ESD. He is the co-founder and co-chair of the Industry Council on ESD Target Levels. Currently, he represents EOS/ESD Association, Inc. as president and editor of IEEE EDL. Harald Gossner is an IEEE Fellow.

Hans Kunz joined Texas Instruments as an ESD specialist in 2003, after nine years at Dallas Semiconductor/Maxim. He was elected Distinguished Member of Technical Staff at Texas Instruments in 2017. His past responsibilities include the design, development, and implementation of ESD protection circuits for analog CMOS and high-voltage BiCMOS technologies, as well as the development of ESD verification tools and methodologies.  Hans is currently focused on developing test, measurement, and design methodologies for system-level ESD protection at the IC level.

Hans has been active in the workshop process at both the EOS/ESD Symposium and IEW, serving as both panelist and moderator at various workshops and serving as the EOS/ESD Symposium Workshop Chair in 2010. He has been a frequent member of the EOS/ESD Symposium technical program committee, served as the IEW TPC chair in 2016, and the IEW Management Committee chair in 2017. Hans has also been active in the educational tutorial process of the EOS/ESD Symposium, serving as an instructor since 2007. Hans is a co-author of multiple publications related to ESD and received the Best Presentation Award for the 2006 EOS/ESD Symposium. He holds 13 patents in the area of ESD protection.

Masahiro Yoshida received his BE and ME in electrical and mechanical engineering from the Nagoya Institute of Technology, Nagoya, Japan, in 2021 and 2023, respectively. He is currently pursuing his Ph.D. in engineering at the Nagoya Institute of Technology. His research interests include electromagnetic compatibility (EMC) of electronic circuits and EMC testing of in-vehicle devices.

Dimitrios Kontos is currently a senior principal engineer at Analog Devices (previously Maxim Integrated). He joined Maxim in 2010, working on ESD and latch-up co-design activities for analog ICs built-in BCD technologies. Prior to Maxim, he worked for nVidia Corporation and was responsible for the ESD and latch-up success of the company's chips. He started his career at IBM Microelectronics. First, he joined as a student with his research on ESD and electromigration of copper interconnects. After completing his MSEE at George Mason University, he became part of IBM's ESD/latch-up development group.

Dimitrios Kontos is currently a senior principal engineer at Analog Devices (previously Maxim Integrated). He joined Maxim in 2010, working on ESD and latch-up co-design activities for analog ICs built-in BCD technologies. Prior to Maxim, he worked for nVidia Corporation and was responsible for the ESD and latch-up success of the company's chips. He started his career at IBM Microelectronics. First, he joined as a student with his research on ESD and electromigration of copper interconnects. After completing his MSEE at George Mason University, he became part of IBM's ESD/latch-up development group.

Guido Quax received an MSc and Ph.D. in Applied Physics at the Eindhoven University of Technology in 2003 and 2008, respectively. His Ph.D. research focused on the electrical and optical properties of III-V semiconductor quantum dots. After graduation, he worked in the field of optical properties of soft matter at Philips Research. He joined the ESD team of NXP Semiconductors in 2012, focusing on high voltage and power applications. He has an interest in the experiments and modeling of parasitic bipolars and thyristors in Silicon.

Albert Wang received a BSEE degree from Tsinghua University and a Ph.D. EE degree from the State University of New York at Buffalo. He was a Silicon Valley IC designer before joining academia. Currently, he is a Professor of Electrical and Computer Engineering at the University of California, Riverside, where he is Director of the Laboratory for Integrated Circuits and Systems, and Director of the University of California Center for Ubiquitous Communications by Light. He served as a Program Director of the National Science Foundation (2019-2021). His research covers Analog/Mixed-Signal/RF ICs, Integrated Design-for-Reliability, 3D Heterogeneous Integration, Emerging Nano Devices and Circuits, and LED-based Visible Light Communications. He published 2 books and 320+ papers and holds 16 US patents. His editorial board services include IEEE Electron Device Letters, IEEE Transactions on Circuits and Systems I, IEEE Transactions on Circuits and Systems II, IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices, IEEE Journal of Electron Devices Society, and IEEE Transactions on Device and Materials Reliability. He is/was an IEEE Distinguished Lecturer for the IEEE Electron Devices Society, IEEE Solid-State Circuits Society, and IEEE Circuits and Systems Society. He was President of the IEEE Electron Devices Society (2014-2015). His other professional services include SIA International Technology Roadmap for Semiconductor (ITRS) Committee, IEEE Heterogeneous Integration Roadmap (HIR) Committee, IEEE 5G Initiative Committee, IEEE Fellow Committee, IEEE IoT Technical Community Steering Committee and IEEE Smart Lighting Project Roadmap Committee. He was General Chair for IEEE RFIC Symposium (2016) and IEEE EDTM (2021). Wang is a recipient of the IEEE J. J. Ebers Award (2022). Wang is a Fellow of the National Academy of Inventors and a Fellow of IEEE.

Kateryna Serbulova is a Ph.D. student in the Department of Electrical Engineering at KU Leuven and at imec. She is interested in issues concerning latch-up prevention techniques. Kateryna Serbulova studied micro- and nanotechnology and obtained her B.S. and M.S. at the National Technical University of Ukraine "Igor Sikorsky Kyiv Polytechnic Institute ", Ukraine, in June 2019. After spending a term as an internship student at imec, she joined the Department of Electrical Engineering at KU Leuven and imec in October 2019. Currently, she serves as a TPC member for EOS/ESD Symposium.

Rong-Teng Lin received his M.S. from the Graduate School of Electronics Engineering at the National Taiwan University in 2022.

Rong-Teng Lin received his M.S. from the Graduate School of Electronics Engineering at the National Taiwan University in 2022.

Kateryna Serbulova is a Ph.D. student in the Department of Electrical Engineering at KU Leuven and at imec. She is interested in issues concerning latch-up prevention techniques. Kateryna Serbulova studied micro- and nanotechnology and obtained her B.S. and M.S. at the National Technical University of Ukraine "Igor Sikorsky Kyiv Polytechnic Institute ", Ukraine, in June 2019. After spending a term as an internship student at imec, she joined the Department of Electrical Engineering at KU Leuven and imec in October 2019. Currently, she serves as a TPC member for EOS/ESD Symposium.

Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich, in 1990 and his Ph.D. in electrical engineering from Universität der Bundeswehr, Munich, in 1995. For 15 years, he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD activities for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 110 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association, Inc. for his contributions to the field of ESD. He is the co-founder and co-chair of the Industry Council on ESD Target Levels. Currently, he represents EOS/ESD Association, Inc. as president and editor of IEEE EDL. Harald Gossner is an IEEE Fellow.

Dr. Mirko Scholz received his Ph.D. in Electrical Engineering from the Vrije Universiteit in Brussels (VUB) in 2013. From 2005 until 2017, he was working as an ESD researcher at imec in Leuven/Belgium. From March 2017 until June 2019, he was a program manager at the imec academy and in imec’s process technology transfer activities. Since July 2019, he has been with Infineon Technologies in Munich/Germany, where he is a Principal Engineer in ESD Development. His daily work focuses on component- and system-level ESD protection design for several RF and sensor product lines at Infineon. Since 2007 he has been an active member of different working groups in the ESDA standards committee, currently co-chairing WG 5.6 (Human Metal Model). He was the management chair of the IEW 2018 in Belgium. Since 2019 he has been a member of the steering committee of the EOS/ESD Symposium. In this function, he is the Technical Program Committee (TPC) chair of the EOS/ESD Symposium 2023. For the 2017-2019 term and again for the 2022-2024 term, he has been an elected member of the ESDA Board of Directors. Since 2017 he is heading the business unit of the Advanced Topics Committee of the ESDA. He has authored/co-authored more than 100 publications, tutorials, and patents in the field of ESD design and testing. He is co-author of the 2014 Springer book “System-level ESD Protection”. He is a regular reviewer for several IEEE journals and a current member of the IRPS sub-committee on ESD and Latchup.

Steffen Holland works at Nexperia Semiconductors in Hamburg. He received his Ph.D. in physics at the University of Hamburg, Germany, in 2004. He worked as a member of the research staff at the university until 2005. Afterward he joined the process development group of Philips Semiconductors in Hamburg. Process and device simulations of discrete semiconductor devices, including ESD and surge protection, quickly became the focus of his work. In 2017 he became a system architect for ESD protection devices.

Shudong Huang is a Ph.D. student in the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign. His research interests include the design of broadband ESD protection devices and circuits for high-speed wireline circuits and RFIC in advanced CMOS technologies and compact modeling of ESD devices.

Kuo-Hsuan Meng received his B.S.  from the Department of Electronics Engineering and his M.S. from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2010. He worked at Freescale Semiconductor/NXP, Austin, TX, from 2015 to 2021. He joined Silicon Laboratories, Inc., Austin, TX, in 2021. His research interests include ESD protection network design, I/O library architecture, CAD/EDA for SoC integration, and ESD/latch-up sign-off review.

Shudong Huang is a Ph.D. student in the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign. His research interests include the design of broadband ESD protection devices and circuits for high-speed wireline circuits and RFIC in advanced CMOS technologies and compact modeling of ESD devices.

Kuo-Hsuan Meng received his B.S.  from the Department of Electronics Engineering and his M.S. from the Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, in 2006 and 2007, respectively. He received his Ph.D. from the Department of Electrical and Computer Engineering at the University of Illinois Urbana-Champaign in 2010. He worked at Freescale Semiconductor/NXP, Austin, TX, from 2015 to 2021. He joined Silicon Laboratories, Inc., Austin, TX, in 2021. His research interests include ESD protection network design, I/O library architecture, CAD/EDA for SoC integration, and ESD/latch-up sign-off review.

Steffen Holland works at Nexperia Semiconductors in Hamburg. He received his Ph.D. in physics at the University of Hamburg, Germany, in 2004. He worked as a member of the research staff at the university until 2005. Afterward he joined the process development group of Philips Semiconductors in Hamburg. Process and device simulations of discrete semiconductor devices, including ESD and surge protection, quickly became the focus of his work. In 2017 he became a system architect for ESD protection devices.

Xin Yan received a B.S. in Applied Physics from Beihang University, Beijing, China, in 2015 and an M.S. in Electrical Engineering from Missouri University of Science and Technology, Rolla, USA, in 2018. He is currently working toward a Ph.D. at the Electromagnetic Compatibility Laboratory, Missouri University of Science and Technology, Rolla, USA. His research interests include ESD, EMI, and desense analysis.

Michael Ammer received a B.Eng in mechatronics in 2013 and an MSc in electrical engineering in 2015, both from OTH Regensburg, Regensburg, Germany. In 2020 he received a Ph.D. in electrical engineering from the University of the Federal Armed Forces Munich, Germany. From 2013 to 2015, he was with the sensors advanced development group of Continental Automotive as a working student. Afterward, he joined Infineon Technologies in Munich, Germany, to work on ESD robust systems. His research interests include automotive electronics, ESD protection design, semiconductor physics, system simulation, high-frequency measurement techniques, and transient behavioral modeling of integrated circuits.

Michael Ammer received a B.Eng in mechatronics in 2013 and an MSc in electrical engineering in 2015, both from OTH Regensburg, Regensburg, Germany. In 2020 he received a Ph.D. in electrical engineering from the University of the Federal Armed Forces Munich, Germany. From 2013 to 2015, he was with the sensors advanced development group of Continental Automotive as a working student. Afterward, he joined Infineon Technologies in Munich, Germany, to work on ESD robust systems. His research interests include automotive electronics, ESD protection design, semiconductor physics, system simulation, high-frequency measurement techniques, and transient behavioral modeling of integrated circuits.

Xin Yan received a B.S. in Applied Physics from Beihang University, Beijing, China, in 2015 and an M.S. in Electrical Engineering from Missouri University of Science and Technology, Rolla, USA, in 2018. He is currently working toward a Ph.D. at the Electromagnetic Compatibility Laboratory, Missouri University of Science and Technology, Rolla, USA. His research interests include ESD, EMI, and desense analysis.

Vikas Gupta is the Senior Director of Product Management at GlobalFoundries, focused on Silicon Photonics and ancillary technologies. Prior to the current role, he was the Vice President of Design Systems at POET Technologies. Vikas has an MS in Electrical Engineering from the University of Texas and an MBA from the University of Massachusetts at Amherst.

Matthew Drallmeier received a B.S. in electrical engineering from the Missouri University of Science and Technology, Rolla, MO, USA, in 2021. He is currently pursuing a Ph.D. in electrical and computer engineering at the University of Illinois Urbana-Champaign, Urbana, IL, USA. His current research interests include the analysis and simulation of CDM and high-speed I/O circuit design.

Teruo Suzuki received a B.S. in electrical engineering in 1989 from the Nagoya Institute of Technology and received his Ph.D. in 2013 from Tsukuba University. In 1989, he joined Fujitsu Ltd. He started designing ESD protection circuits in 2002 after working on developing several ASSP products for Ethernet LAN controllers and launching a few processes for Fujitsu supercomputers. In 2015, he moved to Socionext Inc., and he is working on the development and design of ESD protection devices and circuits of the entire Socionext as a principal engineer. He has co-authored a book in the field of ESD. He is one of the core members of the Industry Council on ESD target levels since its inception. He is a member of the Technical Program Committee of the USA EOS/ESD Symposium, IRPS, ESREF, ICSICT, and T-ESDC. He has been the general chair of the RCJ EOS/ESD/EMC symposium in Tokyo, Japan, since 2010. He received the best paper award in 1996, 1998, and 2004 from RCJ EOS/ESD/EMC symposium and the excellent paper award in 2019 from IEEE International Conference on Science, Education, and Viable Engineering.

Christoph Eichenseer received a diploma in physics from the University Regensburg (Germany) in 2011 and a Ph.D. in electrical engineering from the TU Dresden (Germany) in collaboration with Infineon Technologies Regensburg in 2017. In 2016 he started at Infineon in Munich (Germany) as an ESD concept development engineer. In 2019 he joined a job rotation program in an analog circuit design team at Infineon. His main focus is ESD protection concepts in RF, Flash, high-voltage BCD technologies, ESD modeling, ESD dynamic clamps design, and ESD run set development.

Matthew Drallmeier received a B.S. in electrical engineering from the Missouri University of Science and Technology, Rolla, MO, USA, in 2021. He is currently pursuing a Ph.D. in electrical and computer engineering at the University of Illinois Urbana-Champaign, Urbana, IL, USA. His current research interests include the analysis and simulation of CDM and high-speed I/O circuit design.

Christoph Eichenseer received a diploma in physics from the University Regensburg (Germany) in 2011 and a Ph.D. in electrical engineering from the TU Dresden (Germany) in collaboration with Infineon Technologies Regensburg in 2017. In 2016 he started at Infineon in Munich (Germany) as an ESD concept development engineer. In 2019 he joined a job rotation program in an analog circuit design team at Infineon. His main focus is ESD protection concepts in RF, Flash, high-voltage BCD technologies, ESD modeling, ESD dynamic clamps design, and ESD run set development.

Teruo Suzuki received a B.S. in electrical engineering in 1989 from the Nagoya Institute of Technology and received his Ph.D. in 2013 from Tsukuba University. In 1989, he joined Fujitsu Ltd. He started designing ESD protection circuits in 2002 after working on developing several ASSP products for Ethernet LAN controllers and launching a few processes for Fujitsu supercomputers. In 2015, he moved to Socionext Inc., and he is working on the development and design of ESD protection devices and circuits of the entire Socionext as a principal engineer. He has co-authored a book in the field of ESD. He is one of the core members of the Industry Council on ESD target levels since its inception. He is a member of the Technical Program Committee of the USA EOS/ESD Symposium, IRPS, ESREF, ICSICT, and T-ESDC. He has been the general chair of the RCJ EOS/ESD/EMC symposium in Tokyo, Japan, since 2010. He received the best paper award in 1996, 1998, and 2004 from RCJ EOS/ESD/EMC symposium and the excellent paper award in 2019 from IEEE International Conference on Science, Education, and Viable Engineering.