Sunday, October 1

8:30 AM
8:30 AM - 12:00 PM PDT

DD/FC240: System Level ESD/EMI (Principles, Design Troubleshooting, & Demonstrations)

This is a system-level ESD tutorial about reducing ESD effects on systems (boards, chassis, etc.). Real circuits will be demonstrated in class, showing techniques to correct the detrimental effects. Theory and real-life examples from the recent past are used to substantiate the methods. Students will learn the following: 

  • Understand how an ESD soft failure can upset a system and how to design to eliminate soft ESD failures.
  • Realize how ESD and electrical noise can enter a system and acquire methods to locate/remove ESD and electrical noise issues based on electric and magnetic field edification.
  • Encounter new methods to make a circuit board design more robust against direct ESD hits to a connector pin.
  • Assess the Faraday Shield principle and learn to apply it directly to applications to reduce detrimental ESD/EMI effects.
Jay Skolnik

Jay Skolnik

Skolnik Technical Training

Jay Skolnik is a licensed professional electrical engineer and is the co-founder and lead engineer/ consultant of Skolnik Technical Training in Albuquerque, NM. With over thirty years of experience in the electronics industry, Jay has developed a multitude of products utilized in different industries, including military, defense, avionics, aerospace, commercial, industrial, medical, automotive, and sports entertainment. As an ESDA certified program manager, Jay teaches ESD mitigation and control for the electronics and energetics specialties. He performs ESD audits to ensure factories and laboratories are following safe ESD control guidelines and procedures. He is also certified by iNARTE and is a certified professional instructor of national instruments (NI). He received his electrical engineering degree from the University of Missouri-Rolla.

DD/FC240: System Level ESD/EMI (Principles, Design Troubleshooting, & Demonstrations)

1:00 PM
1:00 PM - 4:30 PM PDT

DD134: Fundamentals of ESD System Level

The purpose of this course is to discuss what real-world system level events are and then compare that to device-level testing, where the individual components inside the system are tested for ESD events. This course will cover the system level qualification standards and what is encompassed in those documents. System level characterization methodologies will be reviewed, but the focus will be on the more widely used ones in the industry. And finally, a component of this course is to understand the basis of system level design. 

Kathleen Muhonen

Kathleen Muhonen

Qorvo

Kathleen Muhonen is currently an ESD engineer at Qorvo in Greensboro, NC. She is involved in ESD on-chip protection for RF and Millimeter wave applications. She is heavily involved in system level testing that helps standardize IED testing of RF components and instrumentation for better ESD characterization of clamps and materials. Previously she was responsible for RF characterization and model support for SOI switches and Gallium Arsenide power amplifiers. She has also done extensive work on developing state of the art harmonic and breakdown characterization system for semiconductors and has improved de-embedding techniques of large-scale modeling structures. Kathleen's previous experience includes assistant professor at Penn State Erie, linearization design for base stations at Hewlett Packard, and power amplifier design at Lockheed Martin and GE Aerospace.
Kathleen is a member of the ESD association and is on all device testing standards committees, including serving as past TLP and HMM workgroup chairs. She has also served on the Board of Directors and is now serving as the education committee chair. Kathleen received her BSEE degree from Michigan Technological University in 91, a MSEE from Syracuse in 94 and a PH.D.EE from Penn State University in 1999.

DD134: Fundamentals of ESD System Level