Sunday, September 18

8:00 AM

FC100: ESD Basics for the Program Manager - (NO LIVESTREAM)

Monday, September 19

10:20 AM

Seminar - ESD Event Detection with (Ultra Wide Band) Antennas

11:20 AM

Seminar - Characterization of the linearity of TVS devices

1:00 PM

1A.1 - Case Study: Design of a Ballasted Clamp-Array as On-Chip IEC-61000-4-2 Protection for Data Redriver IC

1:25 PM

1A.2 - Determining the Peak Voltage During TVS Switching at the I/O of an IC Using Component Measurement Data

1:50 PM

Authors Corner for 1A.1 & 1A.2 (NO LIVESTREAM)

2:10 PM

1A.3 - System Level ESD Testing with Capacitively Coupled Stress Pulses

2:35 PM

Invited Paper - Trend Analysis of Dissipated Electrostatic Discharge Energy in Touchscreen Displays

3:20 PM

Invited Paper - Analysis Of CPU Loading Effect On ESD Susceptibility

3:45 PM

Invited Paper - Commercial USB IC Soft-Failure Sensitivity Measurement Method and Trend Analysis

4:10 PM

Authors Corner for EMC Invited Papers (NO LIVESTREAM)

Tuesday, September 20

7:30 AM
9:00 AM

Keynote: Volcanic Lightning: The Electrical Charging and Discharging of Volcanic Eruption Plumes

10:30 AM

Invited Talk - SiC Driving Forward in Automotive Applications

11:45 AM

Exhibitor Showcase - Botron Company, Inc.

11:55 AM

3A.1 - Latchup Co-design Automation for HV Power Analog IC

12:20 PM

Authors Corner for 3A.1 (NO LIVESTREAM)

1:20 PM

Exhibitor Showcase - Forbo Flooring Systems

1:30 PM

3A.2 - HV Active Core Clamps with Over Voltage Protection

1:55 PM

Authors Corner for 3A.2 (NO LIVESTREAM)

2:35 PM

3A.3 - ESD Protection Based on Stacked SCRs With Adjustable Triggering Voltage for CMOS High-Voltage Application

3:00 PM

3A.4 - Short Term Overstress Degradation of ESD Avalanche Diodes Breakdown Characteristics

3:25 PM

Authors Corner for 3A.3 & 3A.4 (NO LIVESTREAM)

Wednesday, September 21

10:00 AM

Showcase - EOS/ESD Association, Inc. Advanced Topic Committee Activities

10:10 AM

Invited Talk - The Challenges of Autonomous Vehicles

11:35 AM

3B.1 - Effect of Floating N-Epi Ring P-Substrate Isolation on HV Latchup

12:00 PM

3B.2 - A Robust Scalable ESD Protection Device integrating Drain side Floating P+ Diffusion with Tunable ESD Design Window and Effective Latch-up Immunity for High-Voltage Power Clamp Applications

12:25 PM

Authors Corner for 3B.1 & 3B.2 (NO LIVESTREAM)

1:25 PM

3B.3 - Circuit Level Implementation of ESD Self Protected LDMOS Open Drain Output

1:50 PM

3B.4 - On-chip ESD Current Sensor for System-level ESD Detection in High Voltage BiCD Technology

2:15 PM

Authors Corner for 3B.2 & 3B.3 (NO LIVESTREAM)

2:45 PM

Seminar - System-Level EMC and ESD Simulation Methods

3:45 PM

Seminar - Fundamentals of System-Level ESD Design and Practical Applications

Thursday, September 22

9:35 AM

Invited Talk - ESD Handling and Control for the Circuit Designer: How Handling Requirements Relate to Device Robustness

10:40 AM

Invited Talk - A Look at CDM Target Levels and Implications for Future Design and Testing of Ultra-High-Performance I/O

12:10 PM

2C.2 - Tracing & Debugging of ESD Failures in a Module Assembly Line

12:40 PM